Inventor

AGA SHAIZEEN

US31 patents

⚠️ This page may combine multiple inventors who share the name “AGA SHAIZEEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

AGA SHAIZEEN

ADVANCED MICRO DEVICES INC

Device and method for accelerating matrix multiply operations

Hardware-software collaborative address mapping scheme for efficient processing-in-memory systems

Hardware-software collaborative address mapping scheme for efficient processing-in-memory systems

Detecting execution hazards in offloaded operations

System and method for coalesced multicast data transfers over memory interfaces

Approach for processing near-memory processing commands using near-memory register definition data

Approach for performing efficient memory operations using near-memory compute elements

Device and method for accelerating matrix multiply operations

Error detection and correction in memory modules using programmable ECC engines

Approach for reducing side effects of computation offload to memory

Approach for supporting memory-centric operations on cached data

Method and apparatus to support instruction replay for executing idempotent code in dependent processing in memory devices

Providing host-based error detection capabilities in a remote execution device

Command throughput in PIM-enabled memory using available data bus bandwidth

Memory access commands with near-memory address generation

Near-memory data reduction

Device and method for accelerating matrix multiply operations

Dynamically coalescing atomic memory operations for memory-local computing

Detecting execution hazards in offloaded operations

Memory allocation for processing-in-memory operations

Memory operations using compound memory commands

System and method for coalesced multicast data transfers over memory interfaces

Near-memory determination of registers

Address mapping-aware tasking mechanism

Approach for managing near-memory processing commands from multiple processor threads to prevent interference at near-memory processing elements

Approach for enabling concurrent execution of host memory commands and near-memory processing commands

Method and apparatus for providing persistence to remote non-volatile memory

Device and method for accelerating matrix multiply operations as a sum of outer products

Near-memory data-dependent gather and packing

UNIV MICHIGAN REGENTS

Trusted computing system with enhanced memory

AGA SHAIZEEN

Ordering constraint management within coherent memory systems