Inventor

CHHABRA SIDDHARTHA

US194 patents

⚠️ This page may combine multiple inventors who share the name “CHHABRA SIDDHARTHA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHHABRA SIDDHARTHA

INTEL CORP

Technologies for implementing mutually distrusting domains

Convolutional memory integrity

Technologies for trusted I/O protection of I/O data with header information

Technologies for integrity, anti-replay, and authenticity assurance for I/O data

Memory integrity with error detection and correction

Entry/exit architecture for protected device modules

Cryptographic cache lines for a trusted execution environment

Encryption interface

Low overhead integrity protection with high availability for trust domains

Techniques for compression memory coloring

Technologies for secure hardware and software attestation for trusted I/O

Convolutional memory integrity

Securing data direct I/O for a secure accelerator interface

Cryptographic memory ownership table for secure public cloud

System, apparatus and method for page granular, software controlled multiple key memory encryption

Supporting secure memory intent

Technologies for secure hardware and software attestation for trusted I/O

Protect non-memory encryption engine (non-mee) metadata in trusted execution environment

Supporting secure memory intent

Secure memory repartitioning

Platform-hardened digital rights management key provisioning

Secure rendering of display surfaces

Apparatus and method for secure memory access using trust domains

Secure routing of trusted software transactions in unsecure fabric

Flexible counter system for memory protection

Cryptographic cache lines for a trusted execution environment

Memory encryption engine interface in compute express link (CXL) attached memory controllers

Cryptographic protection of memory attached over interconnects

Memory tagging for side-channel defense, memory safety, and sandboxing

Technologies for secure I/O with memory encryption engines

Securing data direct I/O for a secure accelerator interface

Cryptographic protection of memory attached over interconnects

System, apparatus and method for integrity protecting tenant workloads in a multi-tenant computing environment

ISA accessible physical unclonable function

Multi-tenant cryptographic memory isolation

System, apparatus and method for configurable trusted input/output access from authorized software

Cryptographic memory ownership table for secure public cloud

Cryptographic memory ownership

Secure reporting of platform state information to a remote server

Link protection for trusted input/output devices

System, apparatus and method for integrity protecting tenant workloads in a multi-tenant computing environment

System, apparatus and method for configurable trusted input/output access from authorized software

Techniques for multi-domain memory encryption

Host-convertible secure enclaves in memory that leverage multi-key total memory encryption with integrity

Supporting secure memory intent

Technologies for protecting virtual machine memory

Technologies for establishing device locality

Processor based component firmware update method and apparatus

CHHABRA SIDDHARTHA

Parallelized counter tree walk for low overhead memory replay protection

NARENDRA TRIVEDI ALPA T

Method and system for protecting memory information in a platform