Inventor

WIEDEMEIER GLEN A

US29 patents

⚠️ This page may combine multiple inventors who share the name “WIEDEMEIER GLEN A”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WIEDEMEIER GLEN A

IBM

Data receiver with a programmable reference voltage to optimize timing jitter

Open-loop quadrature clock corrector and generator

Interface clock frequency switching using a computed insertion delay

Logic line driver system for providing an optimal driver characteristic

Dual duty cycle correction loop for a serializer/deserializer (SerDes) transmitter output

Jitter attenuation buffer structure

Frequency-domain high-speed bus signal integrity compliance model

Built-in-self-test and characterization of a high speed serial link receiver

Redundant clock switch

Peaking transmission line receiver for logic signals

Multimodal memory controllers

Multi-phase clock generation circuit with digital calibration

Phase rotator

High-speed deserializer with programmable and timing robust data slip function

Adjustable phase shifter

System and method for converting between CML signal logic families

Slew rate control for driver circuit

Self-contained built-in self-test circuit with phase-shifting abilities for high-speed receivers

Digital phase detector with zero phase offset

High-speed voltage clamp for unterminated transmission lines

Frequency-domain high-speed bus signal integrity compliance model

Frequency-domain high-speed bus signal integrity compliance model

Frequency-domain high-speed bus signal integrity compliance model

Adjustable switchpoint receiver

Thermally coupled aware device placement

Pulldown driver with gate protection for legacy interfaces

DREPS DANIEL M

Digital phase detector with zero phase offset

Multi-use physical architecture

KOSSEL MARCEL A

Clock feathered slew rate control system