Inventor

LIN MENG-LIANG

TW42 patents

⚠️ This page may combine multiple inventors who share the name “LIN MENG-LIANG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LIN MENG-LIANG

TAIWAN SEMICONDUCTOR MFG CO LTD

Integrated circuit package and method

Fan-out packages and methods of forming the same

Fan-out package with controllable standoff

Integrated circuit package and method

Fan-out package with cavity substrate

Package structure with dam structure and method for forming the same

Methods of forming multiple conductive features in semiconductor devices in a same formation process

Semiconductor package including a circuit substrate having a cavity and a floor plate embedded in a dielectric material and a semiconductor die disposed in the cavity

Structure and formation method of chip package with fan-out feature

Dual-sided routing in 3D SiP structure

Fan-out package with cavity substrate

Chip package with fan-out feature and method for forming the same

Package structure with fan-out feature

Redistribution structure with warpage tuning layer

Semiconductor package including a semiconductor die disposed in a cavity and method for manufacturing thereof

Interposer structure for semiconductor package including peripheral metal pad around alignment mark and methods of fabricating same

Semiconductor package and methods of manufacturing

Package structure with conductive via structure

Dual-sided routing in 3D semiconductor system-in-package structure and methods of forming the same

Fan-out package with controllable standoff

Manufacturing method of semiconductor package including forming cavity in circuit substrate without exposing floor plate

Fan-out package with cavity substrate

Semiconductor devices and methods of manufacturing

Semiconductor package and methods of manufacturing

Method for forming package structure

Integrated circuit packages with ring-shaped substrates

Package structure and method for forming the same

Formation method of chip package with fan-out feature

Semiconductor package and method of manufacturing the same

Semiconductor package and method of manufacturing the same

Fan-out package with controllable standoff

Fan-out package with cavity substrate

Dual-sided routing in 3D SiP structure

Semiconductor package and method of manufacturing the same

Semiconductor devices and methods of manufacturing

Structure and formation method of chip package with fan-out feature

Structure and formation method of package structure with fan-out structure

Inductor RF isolation structure in an interposer and methods of forming the same

Semiconductor device including stress control layer and methods of forming the same

Structures to increase substrate routing density and methods of forming the same

Chip package structure with molding layer and method for forming the same

TAIWAN SEMICONDUCTOR MFG

Bump structures for semiconductor package