Inventor

VILLA FLAVIO

IT51 patents

⚠️ This page may combine multiple inventors who share the name “VILLA FLAVIO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

VILLA FLAVIO

ST MICROELECTRONICS SRL

Process for manufacturing an SOI wafer by annealing and oxidation of buried channels

Method for forming horizontal buried channels or cavities in wafers of monocrystalline semiconductor material

Process for manufacturing buried channels and cavities in semiconductor material wafers

Integrated device based upon semiconductor technology, in particular chemical microreactor

Process for manufacturing a microfluidic device with buried channels

Integrated chemical microreactor, thermally insulated from detection electrodes, and manufacturing and operating methods therefor

Integrated device for microfluid thermoregulation, and manufacturing process thereof

Process for forming a buried cavity in a semiconductor material wafer and a buried cavity

Process for manufacturing integrated chemical microreactors of semiconductor material

Process for forming a buried cavity in a semiconductor material wafer and a buried cavity

Process for manufacturing a SOI wafer with buried oxide regions without cusps

Process for manufacturing low-cost and high-quality SOI substrates

Method for making a low-noise bipolar transistor

Process for manufacturing a wafer by annealing of buried channels

Integrated chemical microreactor, thermally insulated from detection electrodes, and manufacturing and operating methods therefor

Method for producing an SOI wafer

Inexpensive method of manufacturing an SOI wafer

Low-noise bipolar transistor operating predominantly in the bulk region

Magnetic bi-dimensional position sensor

Integrated semiconductor microreactor for real-time monitoring of biological reactions

Method for forming horizontal buried channels or cavities in wafers of monocrystalline semiconductor material

Method for the manufacture of electromagnetic radiation reflecting devices

Method for manufacturing an SOI wafer

Method of forming structures with buried regions in a semiconductor device

Integrated device based upon semiconductor technology, in particular chemical microreactor

Process for manufacturing integrated chemical microreactors of semiconductor material

Integrated chemical microreactor, thermally insulated from detection electrodes, and manufacturing and operating methods therefor

SGS THOMSON MICROELECTRONICS

An integrated hall•effect apparatus for detecting the position of a magnetic element

Wafer of semiconductor material for fabricating integrated devices, and process for its fabrication

Manufacturing method and integrated microstructures of semiconductor material and integrated piezoresistive pressure sensor having a diaphragm of polycrystalline semiconductor material

Wafer of semiconductor material for fabricating integrated devices, and process for its fabrication

Integrated piezoresistive pressure sensor

Method of fabricating integrated semiconductor devices comprising a chemoresistive gas microsensor

Low-noise bipolar transistor

Method for forming zener diode with high time stability and low noise

Semiconductor integrated capacitive acceleration sensor and relative fabrication method

Semiconductor integrated capacitive acceleration sensor and relative fabrication method

Fully depleted lateral transistor

Junction-isolated high-voltage MOS integrated device

Method of fabricating a piezoresistive pressure sensor

Vertical isolated-collector transistor of the pnp type incorporating a device for suppressing the effects of parasitic junction components

Method for fabricating a fully depleted lateral transistor

Method of making junction-isolated high voltage MOS integrated device

SGS MICROELETTRONICA SPA

Bipolar power transistor

Driver element for inductive loads

Power transistor with spaced subtransistors having individual collectors

Power transistor with self-protection against direct secondary breakdown

Buried-resistance semiconductor device and fabrication process

Power transistor with improved resistance to direct secondary breakdown

VILLA FLAVIO

Process for manufacturing a wafer by annealing of buried channels