Inventor
NARAD CHARLES E
US30 patents
⚠️ This page may combine multiple inventors who share the name “NARAD CHARLES E”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
15 patentsUS9294386B2Mar 22, 2016
Apparatus and computer program product for handling network packets using a pipeline of elements
INTEL CORP51 citations98
US7191433B2Mar 13, 2007
Compiler for computer programming language including instruction statements for handling network packets
INTEL CORP98 citations98
US6859841B2Feb 22, 2005
Programmable system for processing a partitioned network infrastructure
INTEL CORP205 citations98
US6625689B2Sep 23, 2003
Multiple consumer-multiple producer rings
INTEL CORP89 citations98
US6421730B1Jul 16, 2002
Programmable system for processing a partitioned network infrastructure
INTEL CORP229 citations98
US6401117B1Jun 4, 2002
Platform permitting execution of multiple network infrastructure applications
INTEL CORP169 citations98
US6157955ADec 5, 2000
Packet processing system including a policy engine having a classification unit
INTEL CORP898 citations98
US6701338B2Mar 2, 2004
Cumulative status of arithmetic operations
INTEL CORP37 citations95
US6996639B2Feb 7, 2006
Configurably prefetching head-of-queue from ring buffers
INTEL CORP43 citations92
US7113985B2Sep 26, 2006
Allocating singles and bursts from a freelist
INTEL CORP21 citations89
US7313140B2Dec 25, 2007
Method and apparatus to assemble data segments into full packets for efficient packet-based classification
INTEL CORP8 citations73
US7103821B2Sep 5, 2006
Method and apparatus for improving network router line rate performance by an improved system for error checking
INTEL CORP7 citations72
US7039054B2May 2, 2006
Method and apparatus for header splitting/splicing and automating recovery of transmit resources on a per-transmit granularity
INTEL CORP10 citations72
US7836165B2Nov 16, 2010
Direct memory access (DMA) transfer of network interface statistics
INTEL CORP2 citations63
US7831974B2Nov 9, 2010
Method and apparatus for serialized mutual exclusion
INTEL CORP5 citations61
SUN MICROSYSTEMS INC
11 patentsUS5692197ANov 25, 1997
Method and apparatus for reducing power consumption in a computer network without sacrificing performance
SUN MICROSYSTEMS INC126 citations98
US5479627ADec 26, 1995
Virtual address to physical address translation cache that supports multiple page sizes
SUN MICROSYSTEMS INC156 citations97
US5892957AApr 6, 1999
Method and apparatus for interrupt communication in packet-switched microprocessor-based computer system
SUN MICROSYSTEMS INC81 citations96
US5689713ANov 18, 1997
Method and apparatus for interrupt communication in a packet-switched computer system
SUN MICROSYSTEMS INC59 citations96
US5657472AAug 12, 1997
Memory transaction execution system and method for multiprocessor system having independent parallel transaction queues associated with each processor
SUN MICROSYSTEMS INC95 citations96
US5560019ASep 24, 1996
Method and apparatus for handling interrupts in a multiprocessor computer system
SUN MICROSYSTEMS INC76 citations96
US5367695ANov 22, 1994
Bus-to-bus interface for preventing data incoherence in a multiple processor computer system
SUN MICROSYSTEMS INC87 citations96
US5956756ASep 21, 1999
Virtual address to physical address translation of pages with unknown and variable sizes
SUN MICROSYSTEMS INC84 citations94
US5572734ANov 5, 1996
Method and apparatus for locking arbitration on a remote bus
SUN MICROSYSTEMS INC43 citations92
US5287503AFeb 15, 1994
System having control registers coupled to a bus whereby addresses on the bus select a control register and a function to be performed on the control register
SUN MICROSYSTEMS INC23 citations92
US5727219AMar 10, 1998
Virtual input/output processor utilizing an interrupt handler
SUN MICROSYSTEMS INC16 citations73