Inventor
IACHETTA JR RICHARD NICHOLAS
US12 patents
Patents
12 patentsUS6081874AJun 27, 2000
Non-uniform memory access (NUMA) data processing system that speculatively issues requests on a node interconnect
IBM58 citations96
US5727171AMar 10, 1998
Method and apparatus for allowing multi-speed synchronous communications between a processor and both slow and fast computing devices
IBM49 citations92
US6192452B1Feb 20, 2001
Method and system for avoiding data loss due to cancelled transactions within a non-uniform memory access system
IBM37 citations91
US5864664AJan 26, 1999
Apparatus and method for protecting system serial number while allowing motherboard replacement
IBM38 citations89
US6085293AJul 4, 2000
Non-uniform memory access (NUMA) data processing system that decreases latency by expediting rerun requests
IBM19 citations84
US7080269B2Jul 18, 2006
Method and apparatus for implementing power-saving sleep mode in design with multiple clock domains
IBM20 citations82
US6829677B1Dec 7, 2004
Method and apparatus for preserving the contents of synchronous DRAM through system reset
IBM18 citations76
US6973520B2Dec 6, 2005
System and method for providing improved bus utilization via target directed completion
IBM8 citations73
US6178472B1Jan 23, 2001
Queue having distributed multiplexing logic
IBM14 citations73
US5867037AFeb 2, 1999
Method and apparatus of programming FPGA devices through ASIC devices
IBM9 citations72
US6055600AApr 25, 2000
Method and apparatus for detecting the presence and identification of level two cache modules
IBM10 citations67
US6801977B2Oct 5, 2004
Method and apparatus for passing messages through a bus-to-bus bridge while maintaining ordering
IBM5 citations62