Inventor
MEIYAPPAN SUBRAMANIAN S
US27 patents
⚠️ This page may combine multiple inventors who share the name “MEIYAPPAN SUBRAMANIAN S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
NEXTNAV LLC
15 patentsUS8874398B2Oct 28, 2014
Wide area positioning system
NEXTNAV LLC18 citations92
US10608695B2Mar 31, 2020
Wide area positioning system
NEXTNAV LLC4 citations84
US9967845B2May 8, 2018
Systems and methods for selectively receiving and processing RF signals at an RF beacon
NEXTNAV LLC7 citations84
US9810788B2Nov 7, 2017
Wide area positioning system
NEXTNAV LLC7 citations84
US9591438B2Mar 7, 2017
Wide area positioning system
NEXTNAV LLC3 citations84
US10231201B2Mar 12, 2019
Systems and methods for assured time synchronization of an RF beacon
NEXTNAV LLC7 citations79
US11115078B2Sep 7, 2021
Wide area positioning system
NEXTNAV LLC1 citations73
US10470129B2Nov 5, 2019
Systems and methods for low-power location determination using terrestrial signals
NEXTNAV LLC2 citations73
US10194395B2Jan 29, 2019
Systems and methods for low-power location determination using terrestrial signals
NEXTNAV LLC4 citations73
US10175945B2Jan 8, 2019
Methods and systems for improving correlation
NEXTNAV LLC5 citations65
US12289131B2Apr 29, 2025
Wide area positioning system
NEXTNAV LLC0 citations62
US11705936B2Jul 18, 2023
Wide area positioning system
NEXTNAV LLC0 citations62
US10649090B2May 12, 2020
Wide area positioning system
NEXTNAV LLC0 citations52
US9408024B2Aug 2, 2016
Wide area positioning system
NEXTNAV LLC0 citations52
US9787649B2Oct 10, 2017
Systems and methods for providing conditional access to transmitted information
NEXTNAV LLC0 citations51
VLSI TECHNOLOGY INC
7 patentsUS6289406B1Sep 11, 2001
Optimizing the performance of asynchronous bus bridges with dynamic transactions
VLSI TECHNOLOGY INC49 citations92
US6233632B1May 15, 2001
Optimizing peripheral component interconnect transactions in a mixed 32/64-bit environment by eliminating unnecessary data transfers
VLSI TECHNOLOGY INC29 citations92
US6311248B1Oct 30, 2001
Method and system for optimized data transfers in a mixed 64-bit/32-bit PCI environment
VLSI TECHNOLOGY INC9 citations74
US6301631B1Oct 9, 2001
Memory mapping method for eliminating dual address cycles in a peripheral component interconnect environment
VLSI TECHNOLOGY INC12 citations74
US6230216B1May 8, 2001
Method for eliminating dual address cycles in a peripheral component interconnect environment
VLSI TECHNOLOGY INC11 citations74
US6178478B1Jan 23, 2001
Smart target mechanism for eliminating dual address cycles in a peripheral component interconnect environment
VLSI TECHNOLOGY INC2 citations63
US6223232B1Apr 24, 2001
System and method to predict configuration of a bus target
VLSI TECHNOLOGY INC3 citations62
KONINKL PHILIPS ELECTRONICS NV
3 patentsUS7100133B1Aug 29, 2006
Computer system and method to dynamically generate system on a chip description files and verification information
KONINKL PHILIPS ELECTRONICS NV105 citations94
US6519670B1Feb 11, 2003
Method and system for optimizing a host bus that directly interfaces to a 16-bit PCMCIA host bus adapter
KONINKL PHILIPS ELECTRONICS NV14 citations84
US6658502B1Dec 2, 2003
Multi-channel and multi-modal direct memory access controller for optimizing performance of host bus
KONINKL PHILIPS ELECTRONICS NV10 citations74