Inventor

BEER PETER

DE40 patents

⚠️ This page may combine multiple inventors who share the name “BEER PETER”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BEER PETER

INFINEON TECHNOLOGIES AG

Memory module, test system and method for testing one or a plurality of memory modules

Method for precharging memory cells of a dynamic semiconductor memory during power-up and semiconductor memory

Integrated circuit having a current measuring unit

Semiconductor chip with trimmable oscillator

Integrated memory having a test circuit for functional testing of the memory

Method and apparatus for masking known fails during memory tests readouts

MRAM with vertical storage element in two layer-arrangement and field sensor

Apparatus and method for reading out defect information items from an integrated chip

Memory chip with test logic taking into consideration the address of a redundant word line and method for testing a memory chip

Memory module having a memory cell and method for fabricating the memory module

Test device, test system and method for testing a memory circuit

Integrated semiconductor circuit configuration

Configuration for measurement of internal voltages of an integrated semiconductor apparatus

Method for testing semiconductor chips

Method for on-chip testing of memory cells of an integrated memory circuit

Integrated memory and method for testing an integrated memory

Adiabatic rotational switching memory element including a ferromagnetic decoupling layer

Dynamic memory cell

Integrated memory circuit having a redundancy circuit and a method for replacing a memory area

Read-out circuit for a dynamic memory circuit, memory cell array, and method for amplifying and reading data stored in a memory cell array

Memory cell configuration for a DRAM memory with a contact bit terminal for two trench capacitors of different rows

Circuit configuration for reading out a programmable link

Integrated semiconductor memory fabrication method

Memory module with improved electrical properties

Memory module, method for activating a memory cell, and method for repairing a defective memory cell

Method and apparatus for masking known fails during memory tests readouts

Test circuit and method for testing an integrated memory circuit

Evaluation circuit for a DRAM

Memory chip having a test mode and method for checking memory cells of a repaired memory chip

Test system and method for testing memory circuits

Method and test circuit for testing a dynamic memory circuit

Circuit configuration for selectively transmitting information items from a measuring device to chips on a wafer during chip fabrication

Memory circuit and method for reading out data

Method and apparatus for checking output signals of an integrated circuit

QIMONDA AG

Integrated semiconductor memory with distributor line for redundant data lines

Integrated electrical module with regular and redundant elements

Method for accessing a memory

INFINEON TECHNOLOGIES

Method for determining the temperature of a semiconductor chip and semiconductor chip with temperature measuring configuration

QIMODA AG

Memory device having an evaluation circuit

ABB TECHNOLOGY AG

System and method for automated transfer and evaluation of the quality of mass data of a technical process or a technical project