Inventor

EMBERLING BRIAN D

US37 patents

⚠️ This page may combine multiple inventors who share the name “EMBERLING BRIAN D”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

EMBERLING BRIAN D

SUN MICROSYSTEMS INC

Method for optimizing utilization of a double-data-rate-SDRAM memory system

Multipurpose memory system for use in a graphics system

Method for improving texture cache access by removing redundant requests

Predictive optimizer for DRAM memory

Capturing data and crossing clock domains in the absence of a free-running source clock

Synchronizing data streams in a graphics processor

Memory interleaving technique for texture mapping in a graphics system

Using observability logic for real-time debugging of ASICs

Reconfigurable hardware filter for texture mapping and image processing

Controlling the propagation of a control signal by means of variable I/O delay compensation using a programmable delay circuit and detection sequence

Controlling the propagation of a digital signal by means of variable I/O delay compensation using delay-tracking

Graphics primitive size estimation and subdivision for use with a texture accumulation buffer

Magnified texture-mapped pixel performance in a single-pixel pipeline

Early primitive assembly and screen-space culling for multiple chip graphics system

Design for a non-blocking cache for texture mapping

Graphics data synchronization with multiple data paths in a graphics accelerator

Method for improving cache-miss performance

Optimized cache structure for multi-texturing

Magnified texture-mapped pixel performance in a single-pixel pipeline

Performance texture mapping by combining requests for image data

Multi-texturing by walking an appropriately-sized supertile over a primitive

Graphics data accumulation for improved multi-layer texture performance

System and method for controlling a number of outstanding data transactions within an integrated circuit

Stalling pipelines in large designs

ADVANCED MICRO DEVICES INC

Method and system for thread monitoring

Register compaction with early release

Wait instruction for preventing execution of one or more instructions until a load counter or store counter reaches a specified value

Indicating instruction scheduling mode for processing wavefront portions

Packed 16 bits instruction pipeline

EMBERLING BRIAN D

Method and system for thread monitoring

Processor with power control via instruction issuance

LEATHER MARK M

Handling of extra contexts for shader constants

Incremental state updates

ORACLE AMERICA INC

Large-kernel convolution using multiple industry-standard graphics accelerators

HOWES LEE W

Method and system for workitem synchronization

LEATHER MARK

Executing first instructions for smaller set of SIMD threads diverging upon conditional branch instruction

SUN MICROSYTEMS INC

Reading a selected register in a series of computational units forming a processing pipeline upon expiration of a time delay