Inventor

CHOI SI-YOUNG

KR89 patents

⚠️ This page may combine multiple inventors who share the name “CHOI SI-YOUNG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CHOI SI-YOUNG

SAMSUNG ELECTRONICS CO LTD

Methods for fabricating fin field effect transistors using a protective layer to reduce etching damage

Fin field effect transistors having multi-layer fin patterns

Vertical channel field effect transistors having insulating layers thereon

Method and device for forming an STI type isolation in a semiconductor device

Methods of forming semiconductor devices having buried oxide patterns

Methods of fabricating fin field effect transistors

Methods of fabricating fin field effect transistors having capping insulation layers

Semiconductor devices having Si and SiGe epitaxial layers

FinFET and method of manufacturing the same

Fin-field effect transistors (Fin-FETs) having protection layers

Methods of fabricating Fin-field effect transistors (Fin-FETs) having protection layers

Integrated circuit field effect transistors including channel-containing fin having regions of high and low doping concentrations

Methods of forming integrated circuits with thermal oxide layers on side walls of gate electrodes wherein the source and drain are higher than the gate electrode

Method and device for forming an STI type isolation in a semiconductor device

Recess gate transistor

Methods of forming electrical interconnects on semiconductor substrates

Selective epitaxial growth method in semiconductor device

Methods of fabricating MOS transistors having recesses with elevated source/drain regions

Semiconductor memory devices having vertical channel transistors and related methods

MOS transistors having recesses with elevated source/drain regions

Fin field effect transistors having capping insulation layers

Methods for fabricating integrated circuit field effect transistors including channel-containing fin having regions of high and low doping concentrations

Fin field effect transistors including epitaxial fins

Finfets having first and second gates of different resistivities

Methods of forming semiconductor devices including fin structures and related devices

Output buffer circuit having signal path used for testing and integrated circuit and test method including the same

Methods of forming double gate electrodes using tunnel and trench

Semiconductor device and method for fabricating the same

Methods of forming patterns of a semiconductor device

Methods of manufacturing trench isolation structures using selective plasma ion immersion implantation and deposition (PIIID)

Semiconductor device having contact pads and method for manufacturing the same

Method of fabricating semiconductor device having metal conducting layer

Method and device for forming an STI type isolation in a semiconductor device

Method of forming a semiconductor device using selective epitaxial growth

Method and apparatus for processing traffic in radio network system

Semiconductor integrated circuit device and a method of fabricating the same

Nonvolatile memory devices with multiple layers having band gap relationships among the layers

Semiconductor integrated circuit device and a method of fabricating the same

Methods for fabricating DRAM semiconductor devices including silicon epitaxial and metal silicide layers

Semiconductor devices having gate structures and contact pads that are lower than the gate structures

Heterogeneous group IV semiconductor substrates, integrated circuits formed on such substrates, and related methods

Measurement circuit and method for serially merging single-ended signals to analyze them

Integrated circuit devices having buried insulation layers and methods of forming the same

KWON BYOUNG-HO

Semiconductor device and method for fabricating the same

Semiconductor device and method for fabricating the same

PARK DONG-WOON

Method of forming pattern, reticle, and computer readable medium for storing program for forming pattern

LEE SANG-RYUL

Microwave oven

SON YONG-HOON

Methods of fabricating MOS transistors having recesses with elevated source/drain regions

KIM JIN-BUM

Methods of manufacturing semiconductor devices with Si and SiGe epitaxial layers

PARK TAI-SU

Methods of forming recessed channel array transistors and methods of manufacturing semiconductor devices