Inventor

CLARK JR WILLIAM M

US48 patents

⚠️ This page may combine multiple inventors who share the name “CLARK JR WILLIAM M”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

CLARK JR WILLIAM M

HRL LAB LLC

Permanently on transistor implemented using a double polysilicon layer CMOS process with buried contact

Method and apparatus using silicide layer for protecting integrated circuits from reverse engineering

Memory with a bit line block and/or a word line block for preventing reverse engineering

Permanently on transistor implemented using a double polysilicon layer CMOS process with buried contact

Integrated circuit with reverse engineering protection

Programmable connector/isolator and double polysilicon layer CMOS process with buried contact using the same

Implanted hidden interconnections in a semiconductor device for preventing reverse engineering

Integrated circuits protected against reverse engineering and method for fabricating the same using vias without metal terminations

Integrated circuit structure with programmable connector/isolator

Memory with a bit line block and/or a word line block for preventing reverse engineering

Use of silicon block process step to camouflage a false transistor

Symmetric non-intrusive and covert technique to render a transistor permanently non-operable

Cryptographic CPU architecture with random instruction masking to thwart differential power analysis

Covert transformation of transistor properties as a circuit protection method

Implanted hidden interconnections in a semiconductor device for preventing reverse engineering

Symmetric non-intrusive and covert technique to render a transistor permanently non-operable

Conductive channel pseudo block process and circuit to inhibit reverse engineering

Covert transformation of transistor properties as a circuit protection method

Integrated circuit modification using well implants

Integrated circuits protected against reverse engineering and method for fabricating the same using an apparent metal contact line terminating on field oxide

Symmetric non-intrusive and covert technique to render a transistor permanently non-operable

HUGHES AIRCRAFT CO

Focused ion beam column

Liquid metal ion source and alloy for ion emission of multiple ionic species

Liquid metal ion source

Integrated circuit resistor fabrication using focused ion beam

Enhanced wetting of liquid metal alloy ion sources

Liquid metal ion source and alloy

Charge-coupled device with focused ion beam fabrication

Ion evaporation source for tin

HUGHES ELECTRONICS CORP

Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering

Secure integrated circuit

Integrated circuit security system and method with implanted interconnections

Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering

Camouflaged circuit structure with step implants

Digital circuit with transistor geometry and channel stops providing camouflage against reverse engineering

Process for fabricating secure integrated circuit

RAYTHEON CO

Integrated circuit with reverse engineering protection

Conductive channel pseudo block process and circuit to inhibit reverse engineering

Use of silicon block process step to camouflage a false transistor

CHOW LAP-WAI

Use of silicide block process to camouflage a false transistor

Conductive channel pseudo block process and circuit to inhibit reverse engineering

Integrated circuit modification using well implants

SHU DAVID B

Cryptographic bus architecture for the prevention of differential power analysis

Cryptographic architecture with random instruction masking to thwart differential power analysis

CLARK JR WILLIAM M

Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer

Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer

PROMTEK

Multilayered integrated circuit with extraneous conductive traces

OREGON GRADUATE INST SCIENCE

Enhanced-wetting, boron-based liquid-metal ion source and method