Inventor
LEONARD TODD E
US25 patents
⚠️ This page may combine multiple inventors who share the name “LEONARD TODD E”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
IBM
19 patentsUS7483806B1Jan 27, 2009
Design structures, method and systems of powering on integrated circuit
IBM23 citations92
US9230940B2Jan 5, 2016
Three-dimensional chip stack for self-powered integrated circuit
IBM12 citations84
US7941772B2May 10, 2011
Dynamic critical path detector for digital logic circuit paths
IBM10 citations84
US7716007B2May 11, 2010
Design structures of powering on integrated circuit
IBM8 citations84
US7715323B2May 11, 2010
Method for monitoring BER in an infiniband environment
IBM12 citations84
US7225387B2May 29, 2007
Multilevel parallel CRC generation and checking circuit
IBM12 citations82
US7103832B2Sep 5, 2006
Scalable cyclic redundancy check circuit
IBM9 citations73
US7898286B2Mar 1, 2011
Critical path redundant logic for mitigation of hardware across chip variation
IBM3 citations62
US7886210B2Feb 8, 2011
Apparatus for pipelined cyclic redundancy check circuit with multiple intermediate outputs
IBM3 citations62
US7869379B2Jan 11, 2011
Method for monitoring channel eye characteristics in a high-speed SerDes data link
IBM4 citations62
US7823017B2Oct 26, 2010
Structure for task based debugger (transaction-event-job-trigger)
IBM4 citations62
US7594140B2Sep 22, 2009
Task based debugger (transaction-event-job-trigger)
IBM2 citations62
US8989313B2Mar 24, 2015
Adaptable receiver detection
IBM3 citations61
US8016482B2Sep 13, 2011
Method and systems of powering on integrated circuit
IBM4 citations60
US7904872B2Mar 8, 2011
System-on-chip (SOC), design structure and method
IBM2 citations59
US9337173B2May 10, 2016
Three-dimensional inter-chip contact through vertical displacement MEMS
IBM0 citations52
US9123492B2Sep 1, 2015
Three-dimensional inter-chip contact through vertical displacement MEMS
IBM0 citations52
US7904873B2Mar 8, 2011
System-on-chip (SOC), design structure and method
IBM0 citations49
US9600232B2Mar 21, 2017
Aligning FIFO pointers in a data communications lane of a serial link
IBM0 citations37
BUETI SERAFINO
2 patentsUS8132136B2Mar 6, 2012
Dynamic critical path detector for digital logic circuit paths
BUETI SERAFINO7 citations82
US8291357B2Oct 16, 2012
On-chip identification circuit incorporating pairs of conductors, each having an essentially random chance of being shorted together as a result of process variations
BUETI SERAFINO5 citations60