Inventor

SULLAM BERT

US42 patents

⚠️ This page may combine multiple inventors who share the name “SULLAM BERT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SULLAM BERT

CYPRESS SEMICONDUCTOR CORP

System level interconnect with programmable switching

Emulator chip/board architecture and interface

Architecture for synchronizing and resetting clock signals supplied to multiple programmable analog blocks

Method for synchronizing and resetting clock signals supplied to multiple programmable analog blocks

Method and circuit for allowing a microprocessor to change its operating frequency on-the-fly

System and method of providing a programmable clock architecture for an advanced microcontroller

Method and circuit for synchronizing a write operation between an on-chip microprocessor and an on-chip programmable analog device operating at different frequencies

Reconfigurable testing system and method

Universal digital block interconnection and channel routing

System level interconnect with programmable switching

System level interconnect with programmable switching

Configurable analog to digital converter

System level interconnect with programmable switching

Combined analog architecture and functionality in a mixed-signal array

Combined analog architecture and functionality in a mixed-signal array

Independent control of core system blocks for power optimization

Ultra-low power adaptively reconfigurable system

Ultra-low power adaptively reconfigurable system

Sensor with noise mitigation

Low-power programmable analog subsystem for acoustic activity detection

System and method for configuring programmable analog block

System level interconnect with programmable switching

Universal digital block interconnection and channel routing

Autonomous adaptively reconfigurable system

SULLAM BERT

Programmable interrupt routing system

Built in system bus interface for random access to programmable logic registers

System level interconnect with programmable switching

Addressing scheme to allow flexible mapping of functions in a programmable logic array

Programmable interrupt routing system

Dynamically reconfigurable analog routing circuits and methods for system on a chip

Autonomous control in a programmable system

Addressing scheme to allow flexible mapping of functions in a programmable logic array

KUTZ HAROLD

Combined analog architecture and functionality in a mixed-signal array

Configurable reset pin for input/output port

On-chip calibration method

On-chip calibration method

SNYDER WARREN

Universal digital block interconnection and channel routing

Active liquid crystal display drivers and duty cycle operation

SYNDER WARREN

Clock driven dynamic datapath chaining

Dynamically configurable and re-configurable data path

PLEIS MATTHEW A

Reconfigurable testing system and method

KAVAIYA GAURANG

Processor independent line driving and receiving system