Inventor
TETRICK R SCOTT
US14 patents
⚠️ This page may combine multiple inventors who share the name “TETRICK R SCOTT”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
8 patentsUS5682512AOct 28, 1997
Use of deferred bus access for address translation in a shared memory clustered computer system
INTEL CORP157 citations97
US5737615AApr 7, 1998
Microprocessor power control in a multiprocessor computer system
INTEL CORP71 citations95
US7539812B2May 26, 2009
System and method to increase DRAM parallelism
INTEL CORP25 citations91
US5768585AJun 16, 1998
System and method for synchronizing multiple processors during power-on self testing
INTEL CORP50 citations90
US7895397B2Feb 22, 2011
Using inter-arrival times of data requests to cache data in a computing environment
INTEL CORP3 citations61
US5640520AJun 17, 1997
Mechanism for supporting out-of-order service of bus requests with in-order only requesters devices
INTEL CORP6 citations61
US8051232B2Nov 1, 2011
Data storage device performance optimization methods and apparatuses
INTEL CORP6 citations57
US7827352B2Nov 2, 2010
Loading data from a memory card
INTEL CORP0 citations51
TETRICK R SCOTT
3 patentsUS8166229B2Apr 24, 2012
Apparatus and method for multi-level cache utilization
TETRICK R SCOTT2 citations59
US8127294B2Feb 28, 2012
Disk drive for handling conflicting deadlines and methods thereof
TETRICK R SCOTT1 citations49
US8433854B2Apr 30, 2013
Apparatus and method for cache utilization
TETRICK R SCOTT1 citations44