Inventor
NISHIMOTO JUNICHI
JP39 patents
⚠️ This page may combine multiple inventors who share the name “NISHIMOTO JUNICHI”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
RENESAS TECH CORP
15 patentsUS6894944B2May 17, 2005
Semiconductor integrated circuit device
RENESAS TECH CORP34 citations93
US7401165B2Jul 15, 2008
Data processing system and data processor
RENESAS TECH CORP9 citations92
US7401163B2Jul 15, 2008
Data processing system and data processor
RENESAS TECH CORP10 citations92
US6851036B1Feb 1, 2005
Method and apparatus for controlling external devices through address translation buffer
RENESAS TECH CORP27 citations92
US7263565B2Aug 28, 2007
Bus system and integrated circuit having an address monitor unit
RENESAS TECH CORP16 citations84
US6760832B2Jul 6, 2004
Data processor
RENESAS TECH CORP13 citations84
US7479823B2Jan 20, 2009
Multiple circuit blocks with interblock control and power conservation
RENESAS TECH CORP3 citations73
US7468626B2Dec 23, 2008
Multiple circuit blocks with interblock control and power conservation
RENESAS TECH CORP6 citations73
US6853239B2Feb 8, 2005
Multiple circuit blocks with interblock control and power conservation
RENESAS TECH CORP5 citations73
US6898671B2May 24, 2005
Data processor for reducing set-associative cache energy via selective way prediction
RENESAS TECH CORP6 citations63
US7705668B2Apr 27, 2010
Mobile telephone with interblock control for power conservation
RENESAS TECH CORP2 citations62
US7725616B2May 25, 2010
Data processing system and data processor
RENESAS TECH CORP0 citations52
US7149113B2Dec 12, 2006
Semiconductor integrated circuit device
RENESAS TECH CORP0 citations52
US7468627B2Dec 23, 2008
Multiple circuit blocks with interblock control and power conservation
RENESAS TECH CORP0 citations51
US7078959B2Jul 18, 2006
Multiple circuit blocks with interblock control and power conservation
RENESAS TECH CORP0 citations51
HITACHI LTD
12 patentsUS6023757AFeb 8, 2000
Data processor
HITACHI LTD136 citations99
US6092172AJul 18, 2000
Data processor and data processing system having two translation lookaside buffers
HITACHI LTD123 citations98
US5860127AJan 12, 1999
Cache memory employing dynamically controlled data array start timing and a microcomputer using the same
HITACHI LTD72 citations96
US6611458B2Aug 26, 2003
Semiconductor integrated circuit device
HITACHI LTD23 citations93
US6496919B1Dec 17, 2002
Data processor
HITACHI LTD18 citations93
US6639454B2Oct 28, 2003
Multiple circuit blocks with interblock control and power conservation
HITACHI LTD22 citations92
US6532528B1Mar 11, 2003
Data processor and data processor system having multiple modes of address indexing and operation
HITACHI LTD24 citations92
US7058426B2Jun 6, 2006
Communication terminal apparatus
HITACHI LTD11 citations84
US6389523B1May 14, 2002
Cache memory employing dynamically controlled data array start timing and a microprocessor using the same
HITACHI LTD9 citations73
US6601154B2Jul 29, 2003
Cache memory employing dynamically controlled data array start timing and a microcomputer using the same
HITACHI LTD2 citations62
US6070234AMay 30, 2000
Cacche memory employing dynamically controlled data array start timing and a microcomputer using the same
HITACHI LTD3 citations62
US7774021B2Aug 10, 2010
Communication terminal apparatus
HITACHI LTD0 citations52
RENESAS ELECTRONICS CORP
5 patentsUS8378741B2Feb 19, 2013
Multiple circuit blocks with interblock control and power conservation
RENESAS ELECTRONICS CORP1 citations62
US9069911B2Jun 30, 2015
Data processing system and data processor
RENESAS ELECTRONICS CORP0 citations52
US8812750B2Aug 19, 2014
Data processing system and data processor
RENESAS ELECTRONICS CORP0 citations52
US7975077B2Jul 5, 2011
Data processing system and data processor
RENESAS ELECTRONICS CORP0 citations52
US8049556B2Nov 1, 2011
Multiple circuit blocks with interblock control and power conservation
RENESAS ELECTRONICS CORP0 citations51