Inventor
CHEN PINHONG
US13 patents
⚠️ This page may combine multiple inventors who share the name “CHEN PINHONG”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
CADENCE DESIGN SYSTEMS INC
11 patentsUS6971076B2Nov 29, 2005
Method for estimating peak crosstalk noise based on separate crosstalk model
CADENCE DESIGN SYSTEMS INC192 citations98
US7739629B2Jun 15, 2010
Method and mechanism for implementing electronic designs having power information specifications background
CADENCE DESIGN SYSTEMS INC42 citations95
US7954078B1May 31, 2011
High level IC design with power specification and power source hierarchy
CADENCE DESIGN SYSTEMS INC35 citations91
US9026978B1May 5, 2015
Reverse interface logic model for optimizing physical hierarchy under full chip constraint
CADENCE DESIGN SYSTEMS INC32 citations89
US7551985B1Jun 23, 2009
Method and apparatus for power consumption optimization for integrated circuits
CADENCE DESIGN SYSTEMS INC31 citations89
US7082587B2Jul 25, 2006
Method of estimating path delays in an IC
CADENCE DESIGN SYSTEMS INC12 citations82
US9652582B1May 16, 2017
Multi-instantiated block timing optimization
CADENCE DESIGN SYSTEMS INC2 citations71
US11775723B1Oct 3, 2023
Methods, systems, and computer program products for efficiently implementing a 3D-IC
CADENCE DESIGN SYSTEMS INC4 citations68
US11276677B1Mar 15, 2022
Concurrent optimization of 3D-IC with asymmetrical routing layers
CADENCE DESIGN SYSTEMS INC3 citations66
US10204180B1Feb 12, 2019
Method, system, and computer program product for implementing electronic designs with automatically generated power intent
CADENCE DESIGN SYSTEMS INC4 citations66
US10706199B1Jul 7, 2020
Graphical user interface for interactive macro-cell placement
CADENCE DESIGN SYSTEMS INC4 citations64