P

Inventor

HAN JIN-HO

KR39 patents
⚠️ This page may combine multiple inventors who share the name “HAN JIN-HO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

ELECTRONICS & TELECOMMUNICATIONS RES INST

27 patents
US11146253B1Oct 12, 2021

Receiving circuit to process low-voltage signal with hysteresis

ELECTRONICS & TELECOMMUNICATIONS RES INST3 citations73
US9830218B2Nov 28, 2017

Cache memory with fault tolerance

ELECTRONICS & TELECOMMUNICATIONS RES INST3 citations73
US9632894B2Apr 25, 2017

Apparatus for error simulation and method thereof

ELECTRONICS & TELECOMMUNICATIONS RES INST2 citations73
US9575692B2Feb 21, 2017

Cache control device having fault-tolerant function and method of operating the same

ELECTRONICS & TELECOMMUNICATIONS RES INST4 citations73
US9529654B2Dec 27, 2016

Recoverable and fault-tolerant CPU core and control method thereof

ELECTRONICS & TELECOMMUNICATIONS RES INST4 citations73
US10642782B2May 5, 2020

Multi-core processor and operation method thereof

ELECTRONICS & TELECOMMUNICATIONS RES INST3 citations72
US12455825B2Oct 28, 2025

Method for supporting cache coherency based on virtual addresses for artificial intelligence processor having large on-chip memory and apparatus for the same

ELECTRONICS & TELECOMMUNICATIONS RES INST0 citations62
US12231100B2Feb 18, 2025

Apparatus and method for receiving strobe signal

ELECTRONICS & TELECOMMUNICATIONS RES INST0 citations62
US11847465B2Dec 19, 2023

Parallel processor, address generator of parallel processor, and electronic device including parallel processor

ELECTRONICS & TELECOMMUNICATIONS RES INST0 citations62
US11695411B2Jul 4, 2023

Transmitter and operating method of transmitter

ELECTRONICS & TELECOMMUNICATIONS RES INST0 citations62
US11341066B2May 24, 2022

Cache for artificial intelligence processor

ELECTRONICS & TELECOMMUNICATIONS RES INST1 citations62
US11217299B2Jan 4, 2022

Device and method for calibrating reference voltage

ELECTRONICS & TELECOMMUNICATIONS RES INST1 citations62
US10983878B2Apr 20, 2021

Processor for detecting and preventing recognition error

ELECTRONICS & TELECOMMUNICATIONS RES INST1 citations62
US10740167B2Aug 11, 2020

Multi-core processor and cache management method thereof

ELECTRONICS & TELECOMMUNICATIONS RES INST1 citations62
US11893392B2Feb 6, 2024

Multi-processor system and method for processing floating point operation thereof

ELECTRONICS & TELECOMMUNICATIONS RES INST0 citations61
US11842764B2Dec 12, 2023

Artificial intelligence processor and method of processing deep-learning operation using the same

ELECTRONICS & TELECOMMUNICATIONS RES INST0 citations61
US12266400B2Apr 1, 2025

Apparatus and method for ZQ calibration of data transmission driving circuit in memory chip package of multi-memory die structure

ELECTRONICS & TELECOMMUNICATIONS RES INST0 citations52
US12087392B2Sep 10, 2024

Memory interface device

ELECTRONICS & TELECOMMUNICATIONS RES INST0 citations52
US11782835B2Oct 10, 2023

Host apparatus, heterogeneous system architecture device, and heterogeneous system based on unified virtual memory

ELECTRONICS & TELECOMMUNICATIONS RES INST0 citations52
US11036595B2Jun 15, 2021

Semiconductor system including fault manager

ELECTRONICS & TELECOMMUNICATIONS RES INST0 citations52
US9823963B2Nov 21, 2017

Apparatus and method for controlling level 0 cache

ELECTRONICS & TELECOMMUNICATIONS RES INST0 citations52
US10013310B2Jul 3, 2018

Cache memory device and operating method thereof

ELECTRONICS & TELECOMMUNICATIONS RES INST0 citations51
US9859889B2Jan 2, 2018

Ultra low voltage digital circuit and operation method thereof

ELECTRONICS & TELECOMMUNICATIONS RES INST1 citations51
US9824017B2Nov 21, 2017

Cache control apparatus and method

ELECTRONICS & TELECOMMUNICATIONS RES INST1 citations51
US11176395B2Nov 16, 2021

Image recognition processor including functional safety processor core and operation method thereof

ELECTRONICS & TELECOMMUNICATIONS RES INST0 citations50
US12524657B2Jan 13, 2026

AI accelerator, cache memory and method of operating cache memory using the same

ELECTRONICS & TELECOMMUNICATIONS RES INST0 citations49
US10180904B2Jan 15, 2019

Cache memory and operation method thereof

ELECTRONICS & TELECOMMUNICATIONS RES INST0 citations41

KOREA ELECTRONICS TELECOMM

7 patents

HAN JIN HO

4 patents

SAMSUNG ELECTRONICS CO LTD

1 patent