Inventor

KWON YOUNG-SU

KR49 patents

⚠️ This page may combine multiple inventors who share the name “KWON YOUNG-SU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

KWON YOUNG-SU

ELECTRONICS & TELECOMMUNICATIONS RES INST

Receiving circuit to process low-voltage signal with hysteresis

Cache memory with fault tolerance

Apparatus for error simulation and method thereof

Cache control device having fault-tolerant function and method of operating the same

Recoverable and fault-tolerant CPU core and control method thereof

Multi-core processor and operation method thereof

Neural network accelerator including bidirectional processing element array

Method and apparatus for injecting fault and analyzing fault tolerance

Apparatus and method for multicore emulation based on dynamic context switching

Reference voltage calibration method that enables stable and continuous data transmission regardless of operating conditions

Method for supporting cache coherency based on virtual addresses for artificial intelligence processor having large on-chip memory and apparatus for the same

Apparatus and method for receiving strobe signal

Duty cycle monitoring method and apparatus for memory interface

Digital clock and data recovery circuit and feedback loop circuit including the same

Parallel processor, address generator of parallel processor, and electronic device including parallel processor

Electronic device for encoding event indicated by spatial-temporal input signals and operating method thereof

Cache for artificial intelligence processor

Processor for detecting and preventing recognition error

Multi-core processor and cache management method thereof

Processing element and operating method thereof in neural network

Apparatus for receiving data from memory

Memory interface device

Host apparatus, heterogeneous system architecture device, and heterogeneous system based on unified virtual memory

Semiconductor system including fault manager

Image sensor and method for extracting edge of image based on amplitudes of signals output from pixels

Apparatus and method for controlling level 0 cache

Failure recovery apparatus of digital logic circuit and method thereof

Method and apparatus for controlling operation voltage of processor core, and processor system including the same

Cache memory device and operating method thereof

Ultra low voltage digital circuit and operation method thereof

Cache control apparatus and method

Reorganizable data processing array for neural network computing

Image recognition processor including functional safety processor core and operation method thereof

AI accelerator, cache memory and method of operating cache memory using the same

Neural network system including data moving controller

Apparatus and method for recovering functionality of central processing unit core

Processor system and fault detection method thereof

Cache memory and operation method thereof

Can controller and data transmission method using the same

KWON YOUNG SU

Apparatus, method and data processing element for efficient parallel processing of multimedia data

Accessing value for local variable from function call stack upon offset matching with instruction extracted stack pointer offset or from cache

Core cluster, energy scalable vector processing apparatus and method of vector processing including the same

KOREA ELECTRONICS TELECOMM

Apparatus and method for reducing memory access conflict

Embedded system and page relocation method therefor

POSCO

Lithium-adsorptive molded object

Method for producing lithium compound

KWON YOUNG-SU

Processor and instruction processing method in processor

Method and apparatus for data transmission between processors using memory remapping

CHUNG MOO KYOUNG

Vector processing of different instructions selected by each unit from multiple instruction group based on instruction predicate and previous result comparison