P

Inventor

MCKEEN FRANCIS X

US113 patents
⚠️ This page may combine multiple inventors who share the name “MCKEEN FRANCIS X”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

35 patents
US6678825B1Jan 13, 2004

Controlling access to multiple isolated memories in an isolated execution environment

INTEL CORP177 citations99
US6633963B1Oct 14, 2003

Controlling access to multiple memory zones in an isolated execution environment

INTEL CORP220 citations99
US6507904B1Jan 14, 2003

Executing isolated mode instructions in a secure system running in privilege rings

INTEL CORP289 citations99
US7082615B1Jul 25, 2006

Protecting software environment in isolated execution

INTEL CORP78 citations98
US6996710B1Feb 7, 2006

Platform and method for issuing and certifying a hardware-protected attestation key

INTEL CORP74 citations98
US6981129B1Dec 27, 2005

Breaking replay dependency loops in a processor using a rescheduled replay queue

INTEL CORP87 citations98
US6760441B1Jul 6, 2004

Generating a key hieararchy for use in an isolated execution environment

INTEL CORP92 citations98
US7275263B2Sep 25, 2007

Method and system and authenticating a user of a computer system that has a trusted platform module (TPM)

INTEL CORP98 citations97
US7013484B1Mar 14, 2006

Managing a secure environment using a chipset in isolated execution mode

INTEL CORP62 citations96
US6990579B1Jan 24, 2006

Platform and method for remote attestation of a platform

INTEL CORP60 citations96
US6877086B1Apr 5, 2005

Method and apparatus for rescheduling multiple micro-operations in a processor using a replay queue and a counter

INTEL CORP66 citations96
US6795905B1Sep 21, 2004

Controlling accesses to isolated memory using a memory controller for isolated execution

INTEL CORP58 citations96
US10558588B2Feb 11, 2020

Processors, methods, systems, and instructions to support live migration of protected containers

INTEL CORP15 citations94
US9710401B2Jul 18, 2017

Processors, methods, systems, and instructions to support live migration of protected containers

INTEL CORP29 citations94
US7389427B1Jun 17, 2008

Mechanism to secure computer output from software attack using isolated execution

INTEL CORP36 citations93
US7254707B2Aug 7, 2007

Platform and method for remote attestation of a platform

INTEL CORP20 citations93
US7194634B2Mar 20, 2007

Attestation key memory device and bus

INTEL CORP27 citations93
US7096497B2Aug 22, 2006

File checking using remote signing authority via a network

INTEL CORP32 citations93
US7085935B1Aug 1, 2006

Managing a secure environment using a chipset in isolated execution mode

INTEL CORP22 citations93
US7073071B1Jul 4, 2006

Platform and method for generating and utilizing a protected audit log

INTEL CORP19 citations93
US7013481B1Mar 14, 2006

Attestation key memory device and bus

INTEL CORP44 citations93
US6934817B2Aug 23, 2005

Controlling access to multiple memory zones in an isolated execution environment

INTEL CORP44 citations93
US6754815B1Jun 22, 2004

Method and system for scrubbing an isolated area of memory after reset of a processor operating in isolated execution mode if a cleanup flag is set

INTEL CORP50 citations93
US10325118B2Jun 18, 2019

Cryptographic cache lines for a trusted execution environment

INTEL CORP17 citations92
US9448950B2Sep 20, 2016

Using authenticated manifests to enable external certification of multi-processor platforms

INTEL CORP20 citations92
US6957332B1Oct 18, 2005

Managing a secure platform using a hierarchical executive architecture in isolated execution mode

INTEL CORP31 citations92
US6941458B1Sep 6, 2005

Managing a secure platform using a hierarchical executive architecture in isolated execution mode

INTEL CORP21 citations92
US9747102B2Aug 29, 2017

Memory management in secure enclaves

INTEL CORP12 citations91
US11055236B2Jul 6, 2021

Processors, methods, systems, and instructions to support live migration of protected containers

INTEL CORP6 citations84
US10338957B2Jul 2, 2019

Provisioning keys for virtual machine secure enclaves

INTEL CORP8 citations84
US10282306B2May 7, 2019

Supporting secure memory intent

INTEL CORP5 citations84
US9990314B2Jun 5, 2018

Instructions and logic to interrupt and resume paging in a secure enclave page cache

INTEL CORP7 citations84
US9942035B2Apr 10, 2018

Platform migration of secure enclaves

INTEL CORP8 citations84
US9904632B2Feb 27, 2018

Technique for supporting multiple secure enclaves

INTEL CORP11 citations84
US9875189B2Jan 23, 2018

Supporting secure memory intent

INTEL CORP9 citations84

DIGITAL EQUIPMENT CORP

10 patents
US4888679ADec 19, 1989

Method and apparatus using a cache and main memory for both vector processing and scalar processing by prefetching cache blocks including vector data elements

DIGITAL EQUIPMENT CORP151 citations99
US4985825AJan 15, 1991

System for delaying processing of memory access exceptions until the execution stage of an instruction pipeline of a virtual memory system based digital computer

DIGITAL EQUIPMENT CORP128 citations97
US5421022AMay 30, 1995

Apparatus and method for speculatively executing instructions in a computer system

DIGITAL EQUIPMENT CORP67 citations95
US5067069ANov 19, 1991

Control of multiple functional units with parallel operation in a microcoded execution unit

DIGITAL EQUIPMENT CORP113 citations95
US5285323AFeb 8, 1994

Integrated circuit chip having primary and secondary random access memories for a hierarchical cache

DIGITAL EQUIPMENT CORP96 citations94
US5113521AMay 12, 1992

Method and apparatus for handling faults of vector instructions causing memory management exceptions

DIGITAL EQUIPMENT CORP79 citations94
US5109495AApr 28, 1992

Method and apparatus using a source operand list and a source operand pointer queue between the execution unit and the instruction decoding and operand processing units of a pipelined data processor

DIGITAL EQUIPMENT CORP105 citations94
US5420990AMay 30, 1995

Mechanism for enforcing the correct order of instruction execution

DIGITAL EQUIPMENT CORP43 citations91
US5428807AJun 27, 1995

Method and apparatus for propagating exception conditions of a computer system

DIGITAL EQUIPMENT CORP45 citations90
US5168573ADec 1, 1992

Memory device for storing vector registers

DIGITAL EQUIPMENT CORP41 citations90

MCKEEN FRANCIS X

2 patents

JOHNSON SIMON P

1 patent

COMPAQ COMPUTER CORP

1 patent

DIGITAL EQUIPMENT

1 patent

Showing the top 50 of 113 patents by PatentIndex Score.