Inventor
ALEXANDROVICH ILYA
IL40 patents
⚠️ This page may combine multiple inventors who share the name “ALEXANDROVICH ILYA”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
37 patentsUS10558588B2Feb 11, 2020
Processors, methods, systems, and instructions to support live migration of protected containers
INTEL CORP15 citations94
US9710401B2Jul 18, 2017
Processors, methods, systems, and instructions to support live migration of protected containers
INTEL CORP29 citations94
US9747102B2Aug 29, 2017
Memory management in secure enclaves
INTEL CORP12 citations91
US11055236B2Jul 6, 2021
Processors, methods, systems, and instructions to support live migration of protected containers
INTEL CORP6 citations84
US10338957B2Jul 2, 2019
Provisioning keys for virtual machine secure enclaves
INTEL CORP8 citations84
US10282306B2May 7, 2019
Supporting secure memory intent
INTEL CORP5 citations84
US9990314B2Jun 5, 2018
Instructions and logic to interrupt and resume paging in a secure enclave page cache
INTEL CORP7 citations84
US9942035B2Apr 10, 2018
Platform migration of secure enclaves
INTEL CORP8 citations84
US9875189B2Jan 23, 2018
Supporting secure memory intent
INTEL CORP9 citations84
US9767044B2Sep 19, 2017
Secure memory repartitioning
INTEL CORP13 citations84
US9703733B2Jul 11, 2017
Instructions and logic to interrupt and resume paging in a secure enclave page cache
INTEL CORP5 citations84
US9323686B2Apr 26, 2016
Paging in secure enclaves
INTEL CORP9 citations84
US10664179B2May 26, 2020
Processors, methods and systems to allow secure communications between protected container memory and input/output devices
INTEL CORP9 citations83
US9407636B2Aug 2, 2016
Method and apparatus for securely saving and restoring the state of a computing platform
INTEL CORP13 citations83
US9355262B2May 31, 2016
Modifying memory permissions in a secure processing environment
INTEL CORP11 citations83
US11782849B2Oct 10, 2023
Processors, methods, systems, and instructions to support live migration of protected containers
INTEL CORP2 citations73
US11030120B2Jun 8, 2021
Host-convertible secure enclaves in memory that leverage multi-key total memory encryption with integrity
INTEL CORP5 citations73
US10922241B2Feb 16, 2021
Supporting secure memory intent
INTEL CORP3 citations73
US9990197B2Jun 5, 2018
Memory management in secure enclaves
INTEL CORP2 citations73
US11531475B2Dec 20, 2022
Processors, methods and systems to allow secure communications between protected container memory and input/output devices
INTEL CORP2 citations72
US10552344B2Feb 4, 2020
Unblock instruction to reverse page block during paging
INTEL CORP2 citations72
US12242391B2Mar 4, 2025
Processors, methods, systems, and instructions to support live migration of protected containers
INTEL CORP0 citations62
US11995001B2May 28, 2024
Supporting secure memory intent
INTEL CORP0 citations62
US11392507B2Jul 19, 2022
Supporting secure memory intent
INTEL CORP0 citations62
US11204874B2Dec 21, 2021
Secure memory repartitioning technologies
INTEL CORP0 citations62
US10592421B2Mar 17, 2020
Instructions and logic to provide advanced paging capabilities for secure enclave page caches
INTEL CORP1 citations62
US12141450B2Nov 12, 2024
Processors, methods and systems to allow secure communications between protected container memory and input/output devices
INTEL CORP0 citations61
US10628315B2Apr 21, 2020
Secure memory repartitioning technologies
INTEL CORP0 citations52
US10409597B2Sep 10, 2019
Memory management in secure enclaves
INTEL CORP0 citations52
US10324862B2Jun 18, 2019
Supporting oversubscription of guest enclave memory pages
INTEL CORP0 citations52
US10289554B2May 14, 2019
Supporting fault information delivery
INTEL CORP0 citations52
US10120805B2Nov 6, 2018
Managing memory for secure enclaves
INTEL CORP0 citations52
US10019601B2Jul 10, 2018
Method and apparatus for securely saving and restoring the state of a computing platform
INTEL CORP1 citations52
US9798666B2Oct 24, 2017
Supporting fault information delivery
INTEL CORP1 citations52
US9766889B2Sep 19, 2017
Memory management in secure enclaves
INTEL CORP0 citations52
US9690704B2Jun 27, 2017
Paging in secure enclaves
INTEL CORP1 citations52
US10534724B2Jan 14, 2020
Instructions and logic to suspend/resume migration of enclaves in a secure enclave page cache
INTEL CORP0 citations42