Inventor

HOPPE BODO

DE19 patents

⚠️ This page may combine multiple inventors who share the name “HOPPE BODO”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

HOPPE BODO

IBM

Determining a quality parameter for a verification environment

Assuring chip reliability with automatic generation of drivers and assertions

Ranking combinations of mutants, test cases and random seeds in mutation testing

Determine soft error resilience while verifying architectural compliance

System for performing verification of logic circuits

Method for performing verification of logic circuits

Method for verification of gate level netlists using colored bits

Determine soft error resilience while verifying architectural compliance

Error protection analysis of an integrated circuit

Identifying security vulnerabilities using modeled attribute propagation

Ranking combinations of mutants, test cases and random seeds in mutation testing

Assuring chip reliability with automatic generation of drivers and assertions

Verifying processor-sparing functionality in a simulation environment

Measuring execution time of benchmark programs in a simulated environment

Measuring execution time of benchmark programs in a simulated environment

Protecting chip settings using secured scan chains

Error injection for timing margin protection and frequency closure

LETZ STEFAN

Verifying processor-sparing functionality in a simulation environment

GEUKES BENEDIKT

Protecting chip settings using secured scan chains