Inventor
CHANG YEH-CHI
TW2 patents
Patents
2 patentsUS8826212B2Sep 2, 2014
Method of forming a layout including cells having different threshold voltages, a system of implementing and a layout formed
TAIWAN SEMICONDUCTOR MFG112 citations97
US9058462B2Jun 16, 2015
System and method for leakage estimation for standard integrated circuit cells with shared polycrystalline silicon-on-oxide definition-edge (PODE)
TAIWAN SEMICONDUCTOR MFG7 citations82