Inventor
CHOU YA-CHI
TW13 patents
Patents
13 patentsUS11004855B2May 11, 2021
Buried metal track and methods forming same
TAIWAN SEMICONDUCTOR MFG CO LTD7 citations84
US10734321B2Aug 4, 2020
Integrated circuit and method of manufacturing same
TAIWAN SEMICONDUCTOR MFG CO LTD6 citations84
US10553575B2Feb 4, 2020
Semiconductor device having engineering change order (ECO) cells and method of using
TAIWAN SEMICONDUCTOR MFG CO LTD7 citations84
US10446555B2Oct 15, 2019
Buried metal track and methods forming same
TAIWAN SEMICONDUCTOR MFG CO LTD7 citations84
US10268796B2Apr 23, 2019
Method and system for pin layout
TAIWAN SEMICONDUCTOR MFG CO LTD5 citations73
US9831230B2Nov 28, 2017
Standard cell layout, semiconductor device having engineering change order (ECO) cells and method
TAIWAN SEMICONDUCTOR MFG CO LTD4 citations73
US12426357B2Sep 23, 2025
Integrated circuit having fins crossing cell boundary
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations62
US12125850B2Oct 22, 2024
Buried metal track and methods forming same
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations62
US11935888B2Mar 19, 2024
Integrated circuit having fins crossing cell boundary
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations62
US11508661B2Nov 22, 2022
Integrated circuit and method of manufacturing same
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations62
US10796060B2Oct 6, 2020
Method and system for pin layout
TAIWAN SEMICONDUCTOR MFG CO LTD1 citations62
US12299371B2May 13, 2025
Dummy cells placed adjacent functional blocks
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations58
US12341103B2Jun 24, 2025
Integrated circuit and method of manufacturing same
TAIWAN SEMICONDUCTOR MFG CO LTD0 citations52