Inventor
MANAPAT RAJESH
US15 patents
Patents
15 patentsUS6327175B1Dec 4, 2001
Method and apparatus for controlling a memory array with a programmable register
CYPRESS SEMICONDUCTOR CORP51 citations93
US6948084B1Sep 20, 2005
Method for interfacing a synchronous memory to an asynchronous memory interface and logic of same
CYPRESS SEMICONDUCTOR CORP31 citations91
US6791898B1Sep 14, 2004
Memory device providing asynchronous and synchronous data transfer
CYPRESS SEMICONDUCTOR CORP43 citations90
US7006404B1Feb 28, 2006
Memory device with increased data throughput
CYPRESS SEMICONDUCTOR CORP23 citations89
US6640266B2Oct 28, 2003
Method and device for performing write operations to synchronous burst memory
CYPRESS SEMICONDUCTOR CORP21 citations89
US7660167B1Feb 9, 2010
Memory device and method for fast cross row data access
CYPRESS SEMICONDUCTOR CORP9 citations81
US6499089B1Dec 24, 2002
Method, architecture and circuitry for independently configuring a multiple array memory device
CYPRESS SEMICONDUCTOR CORP15 citations81
US7394716B1Jul 1, 2008
Bank availability indications for memory device and method therefor
CYPRESS SEMICONDUCTOR CORP9 citations79
US6388939B1May 14, 2002
Dual port sram
CYPRESS SEMICONDUCTOR CORP13 citations71
US6876563B1Apr 5, 2005
Method for configuring chip selects in memories
CYPRESS SEMICONDUCTOR CORP8 citations70
US5935255AAug 10, 1999
CPU core to bus speed ratio detection
CYPRESS SEMICONDUCTOR CORP14 citations66
US7080222B1Jul 18, 2006
Cellular telephone memory with backup memory interface
CYPRESS SEMICONDUCTOR CORP4 citations60
US7046580B1May 16, 2006
Apparatus and method for address selection
CYPRESS SEMICONDUCTOR CORP5 citations59
US6541998B2Apr 1, 2003
Active termination circuit with an enable/disable
CYPRESS SEMICONDUCTOR CORP4 citations54
US7430140B1Sep 30, 2008
Method and device for improved data valid window in response to temperature variation
CYPRESS SEMICONDUCTOR CORP1 citations43