Inventor
YAP KIRK
US23 patents
⚠️ This page may combine multiple inventors who share the name “YAP KIRK”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
22 patentsUS10270464B1Apr 23, 2019
Method and apparatus for high performance compression and decompression
INTEL CORP17 citations94
US11397692B2Jul 26, 2022
Low overhead integrity protection with high availability for trust domains
INTEL CORP8 citations86
US9503256B2Nov 22, 2016
SMS4 acceleration hardware
INTEL CORP11 citations84
US9047082B2Jun 2, 2015
Instruction-set architecture for programmable Cyclic Redundancy Check (CRC) computations
INTEL CORP7 citations84
US7953221B2May 31, 2011
Method for processing multiple operations
INTEL CORP15 citations81
US11095305B1Aug 17, 2021
Method and apparatus for high performance compression and decompression
INTEL CORP2 citations73
US10871983B2Dec 22, 2020
Process-based multi-key total memory encryption
INTEL CORP2 citations72
US10691529B2Jun 23, 2020
Supporting random access of compressed data
INTEL CORP5 citations72
US12081649B2Sep 3, 2024
Error resilient cryptographic units and methods
INTEL CORP0 citations62
US12021551B2Jun 25, 2024
Method and apparatus for efficient deflate decompression using content-addressable data structures
INTEL CORP0 citations62
US11516013B2Nov 29, 2022
Accelerator for encrypting or decrypting confidential data with additional authentication data
INTEL CORP0 citations62
US11243836B2Feb 8, 2022
Supporting random access of compressed data
INTEL CORP0 citations62
US11108406B2Aug 31, 2021
System, apparatus and method for dynamic priority-aware compression for interconnect fabrics
INTEL CORP1 citations62
US7797612B2Sep 14, 2010
Storage accelerator
INTEL CORP6 citations62
US10924591B2Feb 16, 2021
Low-latency link compression schemes
INTEL CORP1 citations58
US12494800B2Dec 9, 2025
Apparatus and method for constant detection during compress operations
INTEL CORP0 citations54
US11663003B2May 30, 2023
Apparatus and method for executing Boolean functions via forming indexes to an immediate value from source register bits
INTEL CORP0 citations52
US11169934B2Nov 9, 2021
Systems, methods and apparatus for low latency memory integrity mac for trust domain extensions
INTEL CORP0 citations52
US8732548B2May 20, 2014
Instruction-set architecture for programmable cyclic redundancy check (CRC) computations
INTEL CORP0 citations52
US7801299B2Sep 21, 2010
Techniques for merging tables
INTEL CORP0 citations51
US11955995B2Apr 9, 2024
Apparatus and method for two-stage lossless data compression, and two-stage lossless data decompression
INTEL CORP0 citations50
US8363828B2Jan 29, 2013
Diffusion and cryptographic-related operations
INTEL CORP1 citations48