Inventor

LI SHUANGCHEN

US38 patents

⚠️ This page may combine multiple inventors who share the name “LI SHUANGCHEN”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

LI SHUANGCHEN

ALIBABA GROUP HOLDING LTD

Control of NAND flash memory for al applications

Systems and methods for accelerating sparse neural network execution

Method and device for refreshing memory

Processing accelerator architectures

Memory priming and initialization systems and methods

Low-power programmable truncated multiplication circuitry

Flash memory with improved bandwidth

Dual-modal memory interface controller

Using electrical connections that traverse scribe lines to connect devices on a chip

System and method for processing large datasets

Memory interconnection architecture systems and methods

Cache coherency for host-device systems

Device and method for low latency memory access

Configurable processing architecture

Hybrid memory management systems and methods with in-storage processing and attribute data management

Error detection, prediction and handling techniques for system-in-package memory architectures

Performing a top-k function using a binary heap tree

Narrow DRAM channel systems and methods

System and method for memory management

System and method for allocating memory space

ALIBABA CHINA CO LTD

Graph acceleration solution with cloud FPGA

Smart memory extension to processors

Flexible memory extension systems and methods

Data processing system and memory management method of data processing system

Data processing system

Two-dimensional processing array with a vertically stacked memory tile array

Sampler and apparatus for executing graph neural network model

System for graph node sampling and method implemented by computer

ALIBABA DAMO HANGZHOU TECH CO LTD

Processing system that increases the memory capacity of a GPGPU

Programmable access engine architecture for graph neural network and graph application

Devices and methods for accessing and retrieving data in a graph

Processing system that increases the capacity of a very fast memory

T HEAD SHANGHAI SEMICONDUCTOR CO LTD

Access friendly memory architecture of graph neural network sampling

Graph neural network accelerator with attribute caching

Cache access method and associated graph neural network system

SAMSUNG ELECTRONICS CO LTD

Scaling out architecture for dram-based processing unit (DPU)

Scaling out architecture for DRAM-based processing unit (DPU)

Scaling out architecture for DRAM-based processing unit (DPU)