Inventor
LAN JIANN-CHERNG
US4 patents
Patents
4 patentsUS6631093B2Oct 7, 2003
Low power precharge scheme for memory bit lines
INTEL CORP16 citations81
US6629194B2Sep 30, 2003
Method and apparatus for low power memory bit line precharge
INTEL CORP11 citations70
US6833735B2Dec 21, 2004
Single stage pulsed domino circuit for driving cascaded skewed static logic circuits
INTEL CORP11 citations68
US6628539B2Sep 30, 2003
Multi-entry register cell
INTEL CORP0 citations49