Inventor
COFFEE CLARENCE K
US7 patents
⚠️ This page may combine multiple inventors who share the name “COFFEE CLARENCE K”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
COMPAQ COMPUTER CORP
5 patentsUS6202101B1Mar 13, 2001
System and method for concurrently requesting input/output and memory address space while maintaining order of data sent and returned therefrom
COMPAQ COMPUTER CORP58 citations96
US6160562ADec 12, 2000
System and method for aligning an initial cache line of data read from local memory by an input/output device
COMPAQ COMPUTER CORP73 citations96
US6209052B1Mar 27, 2001
System and method for suppressing processor cycles to memory until after a peripheral device write cycle is acknowledged by the memory arbiter
COMPAQ COMPUTER CORP23 citations92
US6199118B1Mar 6, 2001
System and method for aligning an initial cache line of data read from an input/output device by a central processing unit
COMPAQ COMPUTER CORP15 citations84
US6216190B1Apr 10, 2001
System and method for optimally deferring or retrying a cycle upon a processor bus that is destined for a peripheral bus
COMPAQ COMPUTER CORP12 citations74