Inventor · disambiguated record
Sheng Li
Also filed as: LI SHENG · LI SHENG-TING
19 granted patents·5 pending applications·75 citations·filing 2010–2014
92Inventor score
Files withHEWLETT PACKARD ENTPR DEV LP15HEWLETT PACKARD DEVELOPMENT CO LP4LI SHENG3HEWLETT PACKARD DEVELOPMENT CO1UNIV CHUNG YUAN CHRISTIAN1
Top patents by PatentIndex Score
24 records- 0190US9298621B2Managing chip multi-processors through virtual domainsLI SHENG·Filed 2011·Granted Mar 29, 2016·17 cites·19 claims
- 0286US9620181B2Adaptive granularity row-buffer cacheHEWLETT PACKARD DEVELOPMENT CO LP·Filed 2013·Granted Apr 11, 2017·10 cites·20 claims
- 0385US8788904B2Methods and apparatus to perform error detection and correctionLI SHENG·Filed 2011·Granted Jul 22, 2014·9 cites·12 claims
- 0483US10152247B2Atomically committing write requestsHEWLETT PACKARD ENTPR DEV LP·Filed 2014·Granted Dec 11, 2018·7 cites·18 claims
- 0581US10318365B2Selective error correcting code and memory access granularity switchingHEWLETT PACKARD ENTPR DEV LP·Filed 2012·Granted Jun 11, 2019·6 cites·19 claims
- 0681US9823986B2Memory node error correctionHEWLETT PACKARD DEVELOPMENT CO LP·Filed 2013·Granted Nov 21, 2017·6 cites·15 claims
- 0779US10572378B2Dynamic memory expansion by data compressionHEWLETT PACKARD ENTPR DEV LP·Filed 2014·Granted Feb 25, 2020·6 cites·20 claims
- 0877US9952975B2Memory network to route memory traffic and I/O trafficHEWLETT PACKARD DEVELOPMENT CO·Filed 2013·Granted Apr 24, 2018·4 cites·19 claims
- 0968US10572150B2Memory network with memory nodes controlling memory accesses in the memory networkHEWLETT PACKARD ENTPR DEV LP·Filed 2013·Granted Feb 25, 2020·2 cites·7 claims
- 1067US10691344B2Separate memory controllers to access data in memoryHEWLETT PACKARD ENTPR DEV LP·Filed 2013·Granted Jun 23, 2020·2 cites·20 claims
- 1165US9832550B2Radix enhancement for photonic packet switchHEWLETT PACKARD DEVELOPMENT CO LP·Filed 2013·Granted Nov 28, 2017·1 cites·20 claims
- 1262US8379879B2Active noise reduction systemUNIV CHUNG YUAN CHRISTIAN·Filed 2010·Granted Feb 19, 2013·2 cites·24 claims
- 1361US10331560B2Cache coherence in multi-compute-engine systemsHEWLETT PACKARD ENTPR DEV LP·Filed 2014·Granted Jun 25, 2019·1 cites·6 claims
- 1460US10621040B2Memory controllers to form symbols based on burstsHEWLETT PACKARD ENTPR DEV LP·Filed 2012·Granted Apr 14, 2020·2 cites·17 claims
- 1553US10817178B2Compressing and compacting memory on a memory device wherein compressed memory pages are organized by sizeHEWLETT PACKARD ENTPR DEV LP·Filed 2013·Granted Oct 27, 2020·0 cites·13 claims
- 1650US10127282B2Partitionable ternary content addressable memory (TCAM) for use with a bloom filterHEWLETT PACKARD ENTPR DEV LP·Filed 2014·Granted Nov 13, 2018·0 cites·15 claims
- 1749US10241711B2Multiversioned nonvolatile memory hierarchy for persistent memoryHEWLETT PACKARD ENTPR DEV LP·Filed 2013·Granted Mar 26, 2019·0 cites·15 claims
- 1847US10127154B2Caching data in a memory system having memory nodes at different hierarchical levelsHEWLETT PACKARD ENTPR DEV LP·Filed 2013·Granted Nov 13, 2018·0 cites·19 claims
- 1946US10402324B2Memory access for busy memory by receiving data from cache during said busy period and verifying said data utilizing cache hit bit or cache miss bitHEWLETT PACKARD ENTPR DEV LP·Filed 2013·Granted Sep 3, 2019·0 cites·8 claims
- 2046US2018074959A1Node-based computing devices with virtual circuitsHEWLETT PACKARD ENTPR DEV LP·Filed 2014·Application pending·0 cites
- 2145US2016267015A1Mapping virtual memory pages to physical memory pagesHEWLETT PACKARD ENTPR DEV LP·Filed 2013·Application pending·0 cites
- 2243US2017013060A1Communication in a heterogeneous distributed systemHEWLETT PACKARD ENTPR DEV LP·Filed 2014·Application pending·0 cites
- 2337US2016239685A1Hybrid secure non-volatile main memoryHEWLETT PACKARD DEVELOPMENT CO LP·Filed 2013·Application pending·0 cites
- 2435US2015261461A1High performance persistent memoryLI SHENG·Filed 2012·Application pending·0 cites
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