Inventor

MARSHALL ANDREW

US113 patents

⚠️ This page may combine multiple inventors who share the name “MARSHALL ANDREW”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

MARSHALL ANDREW

TEXAS INSTRUMENTS INC

Low current substantially silicide fuse for integrated circuits

Bridge control circuit for eliminating shoot-through current

Buck-boost switch mode power supply with burst topology

Compensation for low gain bipolar transistors in voltage and current reference circuits

Charge pump

Turn-on controller for switch-mode regulator

Systems and methods for efuse fusing time reduction

MOS circuit stabilization of bipolar current mirror collector voltages

High-side MOSFET gate protection shunt circuit

Beta helper for voltage and current reference circuits

Short circuit limit circuit with temperature-dependent current limit

Method for fabricating carbon nanotube transistors on a silicon or SOI substrate

Multiple temperature threshold sensing having a single sense element

N-bit pulse width modulated signal generator

Schottky diode with guard ring

Method of making schottky diode with guard ring

Memory device with memory cell including MuGFET and fin capacitor

Multi-state test structures and methods

Circuit for permanently disabling EEPROM programming

Switching system for selectively enabling electrical power to be applied to plural loads

Cellular phone with scanning capability

Hysteretic fuse control circuit with serial interface fusing

Degradation correction for finFET circuits

Temperature dependent back-bias for a memory array

Body bias coordinator, method of coordinating a body bias and sub-circuit power supply employing the same

Electrically programmable fuse

Memory having circuitry controlling the voltage differential between the word line and array supply voltage

SRAM with temperature-dependent voltage control in sleep mode

Process for forming integrated circuits with both split gate and common gate FinFET transistors

Method for fabricating graphene transistors on a silicon or SOI substrate

Ferroelectric latch

Thermal coupling of matched SOI device bodies

Circuit and method for turn-on of an internal voltage rail

Method and circuit for detecting faulty recirculation diode in a switched mode power supply

Memory cell with transistors having relatively high threshold voltages in response to selective gate doping

Bias cell for four transistor (4T) SRAM operation

PRATT & WHITNEY CANADA

Variable vane actuating system

Oil system for turbine engine and related method

Rotor for gas turbine engine

WOJTYCZKA CZESLAW

Fan case for turbofan engine

Fan case with rub elements

UNIV NEBRASKA

Majority- and minority-gate logic schemes based on magneto-electric devices

RATNER BUDDY D

Crosslinked porous biomaterials

SWAGELOK CO

Fitting for tube and pipe with cartridge

UNIV WASHINGTON

Porous biomaterials

MARSHALL ANDREW

Integrated circuits with split gate and common gate FinFET transistors

UNIV TEXAS

Non-volatile latch using magneto-electric and ferro-electric tunnel junctions

BARNA GABRIEL GEORGE

Recessed STI for wide transistors

UNIV NEW YORK STATE RES FOUND

Exclusive-OR gate using magneto-electric tunnel junctions

MAGINNESS MAX

Granules of porous biocompatible materials