Inventor

FEUDEL THOMAS

DE30 patents

⚠️ This page may combine multiple inventors who share the name “FEUDEL THOMAS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

FEUDEL THOMAS

ADVANCED MICRO DEVICES INC

Reducing transistor junction capacitance by recessing drain and source regions

Transistor having an asymmetric source/drain and halo implantation region and a method of forming the same

Method for manufacturing semiconductor device comprising SOI transistors and bulk transistors

Semiconductor device having improved doping profiles and a method of improving the doping profiles of a semiconductor device

Semiconductor device including a field effect transistor and a passive capacitor having reduced leakage current and an improved capacitance per unit area

Method of forming a metal silicide gate in a standard MOS process sequence

Semiconductor device having an improved strained surface layer and method of forming a strained surface layer in a semiconductor device

Method of controlling a shape of an oxide layer formed on a substrate

Methods of forming a transistor having a recessed gate electrode structure

Methods of forming drain/source extension structures of a field effect transistor using a doped high-k dielectric layer

Method of forming lightly doped regions in a semiconductor device

CMOS gate structure comprising predoped semiconductor gate material with improved uniformity of dopant distribution and method of forming the structure

Method of depositing a layer of a material on a substrate

Semiconductor device having improved doping profiles and method of improving the doping profiles of a semiconductor device

Method of assessing lateral dopant and/or charge carrier profiles

Method of manufacturing a field effect transistor

Technique for locally adapting transistor characteristics by using advanced laser/flash anneal techniques

Field effect transistor having a doped gate electrode with reduced gate depletion and method of forming the transistor

Diode structure for SOI circuits

Semiconductor device having improved halo structures and a method of forming the halo structures of a semiconductor device

Method of forming a semiconductor structure comprising an implantation of ions of a non-doping element

GLOBALFOUNDRIES INC

Technique for enhancing transistor performance by transistor specific contact design

Transistor having a locally provided metal silicide region in contact areas and a method of forming the transistor

HOENTSCHEL JAN

Technique for enhancing dopant profile and channel conductivity by millisecond anneal processes

Technique for enhancing dopant profile and channel conductivity by millisecond anneal processes

FEUDEL THOMAS

Reducing transistor junction capacitance by recessing drain and source regions

Enhancing transistor characteristics by a late deep implantation in combination with a diffusion-free anneal process

GERHARDT MARTIN

Technique for enhancing transistor performance by transistor specific contact design

KRONHOLZ STEPHAN

Reduced STI loss for superior surface planarity of embedded stressors in densely packed semiconductor devices

FLACHOWSKY STEFAN

Methods for fabricating integrated circuits using non-oxidizing resist removal