Inventor
SCHALLER MATTHIAS
DE34 patents
⚠️ This page may combine multiple inventors who share the name “SCHALLER MATTHIAS”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
ADVANCED MICRO DEVICES INC
18 patentsUS7550396B2Jun 23, 2009
Method for reducing resist poisoning during patterning of silicon nitride layers in a semiconductor device
ADVANCED MICRO DEVICES INC507 citations98
US7396718B2Jul 8, 2008
Technique for creating different mechanical strain in different channel regions by forming an etch stop layer stack having differently modified intrinsic stress
ADVANCED MICRO DEVICES INC29 citations92
US7314793B2Jan 1, 2008
Technique for controlling mechanical stress in a channel region by spacer removal
ADVANCED MICRO DEVICES INC39 citations90
US7678690B2Mar 16, 2010
Semiconductor device comprising a contact structure with increased etch selectivity
ADVANCED MICRO DEVICES INC12 citations84
US7517816B2Apr 14, 2009
Technique for creating different mechanical stress in different channel regions by forming an etch stop layer having differently modified intrinsic stress
ADVANCED MICRO DEVICES INC17 citations84
US7122410B2Oct 17, 2006
Polysilicon line having a metal silicide region enabling linewidth scaling including forming a second metal silicide region on the substrate
ADVANCED MICRO DEVICES INC15 citations84
US7986040B2Jul 26, 2011
Method of reducing erosion of a metal cap layer during via patterning in semiconductor devices
ADVANCED MICRO DEVICES INC11 citations83
US7309654B2Dec 18, 2007
Technique for reducing etch damage during the formation of vias and trenches in interlayer dielectrics
ADVANCED MICRO DEVICES INC14 citations82
US7611991B2Nov 3, 2009
Technique for increasing adhesion of metallization layers by providing dummy vias
ADVANCED MICRO DEVICES INC8 citations79
US7592258B2Sep 22, 2009
Metallization layer of a semiconductor device having differently thick metal lines and a method of forming the same
ADVANCED MICRO DEVICES INC7 citations74
US7416973B2Aug 26, 2008
Method of increasing the etch selectivity in a contact structure of semiconductor devices
ADVANCED MICRO DEVICES INC8 citations73
US7098140B2Aug 29, 2006
Method of compensating for etch rate non-uniformities by ion implantation
ADVANCED MICRO DEVICES INC10 citations73
US7005305B2Feb 28, 2006
Signal layer for generating characteristic optical plasma emissions
ADVANCED MICRO DEVICES INC7 citations73
US7279415B2Oct 9, 2007
Method for forming a metallization layer stack to reduce the roughness of metal lines
ADVANCED MICRO DEVICES INC2 citations63
US7608501B2Oct 27, 2009
Technique for creating different mechanical strain by forming a contact etch stop layer stack having differently modified intrinsic stress
ADVANCED MICRO DEVICES INC2 citations62
US7482219B2Jan 27, 2009
Technique for creating different mechanical strain by a contact etch stop layer stack with an intermediate etch stop layer
ADVANCED MICRO DEVICES INC6 citations62
US7763532B2Jul 27, 2010
Technique for forming a dielectric etch stop layer above a structure including closely spaced lines
ADVANCED MICRO DEVICES INC4 citations57
US7704889B2Apr 27, 2010
Method and system for advanced process control in an etch system by gas flow control on the basis of CD measurements
ADVANCED MICRO DEVICES INC0 citations46
SCHALLER MATTHIAS
5 patentsUS8575041B2Nov 5, 2013
Repair of damaged surface areas of sensitive low-K dielectrics of microstructure devices after plasma processing by in situ treatment
SCHALLER MATTHIAS1 citations50
US8440579B2May 14, 2013
Re-establishing surface characteristics of sensitive low-k dielectrics in microstructure device by using an in situ surface modification
SCHALLER MATTHIAS1 citations50
US8888947B2Nov 18, 2014
Method and system for advanced process control in an etch system by gas flow control on the basis of CD measurements
SCHALLER MATTHIAS0 citations45
US8423320B2Apr 16, 2013
Method and system for quantitative inline material characterization in semiconductor production processes based on structural measurements and related models
SCHALLER MATTHIAS0 citations39
US8110498B2Feb 7, 2012
Method for passivating exposed copper surfaces in a metallization layer of a semiconductor device
SCHALLER MATTHIAS0 citations35
GLOBALFOUNDRIES INC
3 patentsUS7700377B2Apr 20, 2010
Method for reducing etch-induced process uniformities by omitting deposition of an endpoint detection layer during patterning of stressed overlayers in a semiconductor device
GLOBALFOUNDRIES INC2 citations62
US7883629B2Feb 8, 2011
Technique for patterning differently stressed layers formed above transistors by enhanced etch control strategies
GLOBALFOUNDRIES INC0 citations47
US7763547B2Jul 27, 2010
Technique for enhancing process flexibility during the formation of vias and trenches in low-k interlayer dielectrics
GLOBALFOUNDRIES INC0 citations42