Inventor

RADHAKRISHNAN GOWRISANKAR

US35 patents

⚠️ This page may combine multiple inventors who share the name “RADHAKRISHNAN GOWRISANKAR”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

RADHAKRISHNAN GOWRISANKAR

IBM

Implementing hardware accelerator for storage write cache management for managing cache destage rates and thresholds for storage write cache

Reducing latency for raid destage operations

Firmware bypass for medium-access commands

Implementing hardware accelerator for storage write cache management for managing cache line updates for writes, reads, and destages in storage write cache

Implementing hardware accelerator for storage write cache management for identification of data age in storage write cache

Implementing hardware accelerator for storage write cache management with cache line manipulation

Implementing hardware accelerator for storage write cache management for destage operations from storage write cache

Implementing hardware accelerator for storage write cache management for managing cache line updates for purges from storage write cache

Implementing hardware accelerator for storage write cache management for reads with partial read hits from storage write cache

Implementing hardware accelerator for storage write cache management for merging data with existing data on fast writes to storage write cache

Implementing hardware accelerator for storage write cache management for simultaneous read and destage operations from storage write cache

Implementing hardware accelerator for storage write cache management for reads from storage write cache

Implementing hardware accelerator for storage write cache management for writes to storage write cache

Dynamic tier remapping of data stored in a hybrid storage system

Implementing hardware accelerator for storage write cache management for managing cache destage rates and thresholds for storage write cache

Dynamic tier remapping of data stored in a hybrid storage system

Implementing hardware accelerator for storage write cache management

BAKKE BRIAN E

Implementing storage adapter performance optimization with chained hardware operations minimizing hardware/firmware interactions

Implementing storage adapter performance optimization with parity update footprint mirroring

Implementing storage adapter performance optimization with cache data/directory mirroring

Implementing storage adapter performance optimization with hardware accelerators offloading firmware for buffer allocation and automatically DMA

Implementing storage adapter performance optimization with hardware chains to select performance path

Implementing storage adapter performance optimization with chained hardware operations and error recovery firmware path

Implementing storage adapter performance optimization with enhanced hardware and software interface

Implementing storage adapter performance optimization with enhanced resource pool allocation

AVAGO TECH INT SALES PTE LID

Method and system for hardware accelerated read-ahead caching

Method and system for efficient cache buffering supporting variable stripe sizes to enable hardware acceleration

Method and system for hardware accelerated row lock for a write back volume

Method and system for hardware accelerated cache flush

Method and system for handling bad blocks in a hardware accelerated caching solution

Method and system for hardware accelerated copyback

AVAGO TECHNOLOGIES GENERAL IP

Method and system for efficient cache buffering in a system having parity arms to enable hardware acceleration

Memory controller utilizing scatter gather list techniques

Space efficient formats for scatter gather lists

Storage controller cache memory operations that forego region locking