P

Inventor

SHRALL JEREMY J

US46 patents
⚠️ This page may combine multiple inventors who share the name “SHRALL JEREMY J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

INTEL CORP

34 patents
US7685441B2Mar 23, 2010

Power control unit with digitally supplied system parameters

INTEL CORP16 citations90
US9898067B2Feb 20, 2018

Method and apparatus to configure thermal design power in a microprocessor

INTEL CORP6 citations84
US9594560B2Mar 14, 2017

Estimating scalability value for a specific domain of a multicore processor based on active state residency of the domain, stall duration of the domain, memory bandwidth of the domain, and a plurality of coefficients based on a workload to execute on the domain

INTEL CORP10 citations84
US9348407B2May 24, 2016

Method and apparatus for atomic frequency and voltage changes

INTEL CORP6 citations84
US10168758B2Jan 1, 2019

Techniques to enable communication between a processor and voltage regulator

INTEL CORP7 citations83
US9235252B2Jan 12, 2016

Dynamic balancing of power across a plurality of processor domains according to power policy control bias

INTEL CORP13 citations83
US9189046B2Nov 17, 2015

Performing cross-domain thermal control in a processor

INTEL CORP6 citations83
US8037326B2Oct 11, 2011

Power control unit with digitally supplied system parameters

INTEL CORP7 citations82
US11221857B2Jan 11, 2022

Collaborative processor and system performance and power management

INTEL CORP0 citations73
US10275260B2Apr 30, 2019

Collaborative processor and system performance and power management

INTEL CORP1 citations73
US10139882B2Nov 27, 2018

System, method and apparatus for energy efficiency and energy conservation by configuring power management parameters during run time

INTEL CORP2 citations73
US10761580B2Sep 1, 2020

Techniques to enable communication between a processor and voltage regulator

INTEL CORP1 citations72
US10345884B2Jul 9, 2019

Mechanism to provide workload and configuration-aware deterministic performance for microprocessors

INTEL CORP2 citations71
US9081577B2Jul 14, 2015

Independent control of processor core retention states

INTEL CORP4 citations69
US9405345B2Aug 2, 2016

Constraining processor operation based on power envelope information

INTEL CORP2 citations63
US9176565B2Nov 3, 2015

Controlling operating frequency of a core domain based on operating condition of a non-core domain of a multi-domain processor

INTEL CORP3 citations63
US10963028B2Mar 30, 2021

System, method and apparatus for energy efficiency and energy conservation by configuring power management parameters during run time

INTEL CORP0 citations62
US10007528B2Jun 26, 2018

Computing platform interface with memory management

INTEL CORP1 citations62
US12210395B2Jan 28, 2025

Techniques to enable communication between a processor and voltage regulator

INTEL CORP0 citations61
US11782492B2Oct 10, 2023

Techniques to enable communication between a processor and voltage regulator

INTEL CORP0 citations61
US11402887B2Aug 2, 2022

Techniques to enable communication between a processor and voltage regulator

INTEL CORP0 citations61
US11016916B2May 25, 2021

Generation of processor interrupts using averaged data

INTEL CORP0 citations59
US11119555B2Sep 14, 2021

Processor to pre-empt voltage ramps for exit latency reductions

INTEL CORP0 citations54
US9939879B2Apr 10, 2018

Controlling operating frequency of a core domain via a non-core domain of a multi-domain processor

INTEL CORP0 citations52
US9671854B2Jun 6, 2017

Controlling configurable peak performance limits of a processor

INTEL CORP0 citations52
US9086834B2Jul 21, 2015

Controlling configurable peak performance limits of a processor

INTEL CORP0 citations52
US9075556B2Jul 7, 2015

Controlling configurable peak performance limits of a processor

INTEL CORP1 citations52
US9417681B2Aug 16, 2016

Mechanism to provide workload and configuration-aware deterministic performance for microprocessors

INTEL CORP0 citations50
US10754404B2Aug 25, 2020

Compensation control for variable power rails

INTEL CORP0 citations49
US10657083B2May 19, 2020

Generation of processor interrupts using averaged data

INTEL CORP0 citations48
US9785223B2Oct 10, 2017

Power management in an uncore fabric

INTEL CORP0 citations46
US10423206B2Sep 24, 2019

Processor to pre-empt voltage ramps for exit latency reductions

INTEL CORP0 citations44
US9513688B2Dec 6, 2016

Measurement of performance scalability in a microprocessor

INTEL CORP0 citations42
US9268393B2Feb 23, 2016

Enforcing a power consumption duty cycle in a processor

INTEL CORP0 citations40

THERIEN GUY M

3 patents

VARMA ANKUSH

2 patents

BHANDARU MALINI K

1 patent

DIXON MARTIN G

1 patent

ANANTHAKRISHNAN AVINASH N

1 patent

CONRAD SHAUN M

1 patent

MAN XIUTING C

1 patent

SHAH KETAN R

1 patent

SHRALL JEREMY J

1 patent