Inventor
YOSEF YUVAL
IL19 patents
⚠️ This page may combine multiple inventors who share the name “YOSEF YUVAL”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
14 patentsUS9361116B2Jun 7, 2016
Apparatus and method for low-latency invocation of accelerators
INTEL CORP13 citations92
US10095521B2Oct 9, 2018
Apparatus and method for low-latency invocation of accelerators
INTEL CORP4 citations84
US9417873B2Aug 16, 2016
Apparatus and method for a hybrid latency-throughput processor
INTEL CORP11 citations83
US7725745B2May 25, 2010
Power aware software pipelining for hardware accelerators
INTEL CORP12 citations83
US10255077B2Apr 9, 2019
Apparatus and method for a hybrid latency-throughput processor
INTEL CORP4 citations72
US9542193B2Jan 10, 2017
Memory address collision detection of ordered parallel threads with bloom filters
INTEL CORP3 citations71
US9459874B2Oct 4, 2016
Instruction set architecture-based inter-sequencer communications with a heterogeneous resource
INTEL CORP1 citations62
US10346195B2Jul 9, 2019
Apparatus and method for invocation of a multi threaded accelerator
INTEL CORP0 citations52
US10089113B2Oct 2, 2018
Apparatus and method for low-latency invocation of accelerators
INTEL CORP0 citations52
US10083037B2Sep 25, 2018
Apparatus and method for low-latency invocation of accelerators
INTEL CORP0 citations52
US9588771B2Mar 7, 2017
Instruction set architecture-based inter-sequencer communications with a heterogeneous resource
INTEL CORP1 citations52
US10664284B2May 26, 2020
Apparatus and method for a hybrid latency-throughput processor
INTEL CORP0 citations51
US10140129B2Nov 27, 2018
Processing core having shared front end unit
INTEL CORP1 citations51
US10101999B2Oct 16, 2018
Memory address collision detection of ordered parallel threads with bloom filters
INTEL CORP0 citations51