Inventor
HOU HSIN-MING
TW14 patents
⚠️ This page may combine multiple inventors who share the name “HOU HSIN-MING”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
UNITED MICROELECTRONICS CORP
8 patentsUS12484237B2Nov 25, 2025
Insulated gate bipolar transistor
UNITED MICROELECTRONICS CORP0 citations60
US7566647B2Jul 28, 2009
Method of disposing and arranging dummy patterns
UNITED MICROELECTRONICS CORP3 citations60
US9443970B2Sep 13, 2016
Semiconductor device with epitaxial structures and method for fabricating the same
UNITED MICROELECTRONICS CORP0 citations51
US12563764B2Feb 24, 2026
Complementary high electron mobility transistor
UNITED MICROELECTRONICS CORP0 citations50
US9958494B2May 1, 2018
Hierarchical wafer lifetime prediction method
UNITED MICROELECTRONICS CORP1 citations50
US9129076B2Sep 8, 2015
Hierarchical wafer yield prediction method and hierarchical lifetime prediction method
UNITED MICROELECTRONICS CORP1 citations50
US8930865B1Jan 6, 2015
Layout correcting method and layout correcting system
UNITED MICROELECTRONICS CORP0 citations50
US9299624B2Mar 29, 2016
Stacked semiconductor structure and manufacturing method for the same
UNITED MICROELECTRONICS CORP0 citations40
HOU HSIN-MING
6 patentsUS8434030B1Apr 30, 2013
Integrated circuit design and fabrication method by way of detecting and scoring hotspots
HOU HSIN-MING16 citations81
US9202914B2Dec 1, 2015
Semiconductor device and method for fabricating the same
HOU HSIN-MING1 citations51
US9159809B2Oct 13, 2015
Multi-gate transistor device
HOU HSIN-MING0 citations49
US8965550B2Feb 24, 2015
Experiments method for predicting wafer fabrication outcome
HOU HSIN-MING1 citations49
US8643397B2Feb 4, 2014
Transistor array for testing
HOU HSIN-MING0 citations49
US8410571B2Apr 2, 2013
Layout of dummy patterns
HOU HSIN-MING1 citations49