Inventor
DEBORD JEFFREY R
US15 patents
Patents
15 patentsUS9818795B2Nov 14, 2017
CMOS compatible thermopile with low impedance contact
TEXAS INSTRUMENTS INC2 citations72
US9496313B2Nov 15, 2016
CMOS-based thermopile with reduced thermal conductance
TEXAS INSTRUMENTS INC4 citations72
US10032863B2Jul 24, 2018
Isolated semiconductor layer in bulk wafer by localized silicon epitaxial seed formation
TEXAS INSTRUMENTS INC2 citations71
US9865498B2Jan 9, 2018
Isolated semiconductor layer over buried isolation layer
TEXAS INSTRUMENTS INC2 citations71
US9472571B2Oct 18, 2016
Isolated semiconductor layer over buried isolation layer
TEXAS INSTRUMENTS INC4 citations71
US9437652B2Sep 6, 2016
CMOS compatible thermopile with low impedance contact
TEXAS INSTRUMENTS INC2 citations62
US10886164B2Jan 5, 2021
Isolated semiconductor layer over buried isolation layer
TEXAS INSTRUMENTS INC0 citations61
US9330959B2May 3, 2016
Isolated semiconductor layer in bulk wafer by localized silicon epitaxial seed formation
TEXAS INSTRUMENTS INC2 citations61
US8883541B2Nov 11, 2014
Self-powered integrated circuit with multi-junction photovoltaic cell
TEXAS INSTRUMENTS INC2 citations56
US9853086B2Dec 26, 2017
CMOS-based thermopile with reduced thermal conductance
TEXAS INSTRUMENTS INC1 citations51
US10516019B2Dec 24, 2019
Isolated semiconductor layer in bulk wafer by localized silicon epitaxial seed formation
TEXAS INSTRUMENTS INC0 citations50
US9437799B2Sep 6, 2016
Method of forming a CMOS-based thermoelectric device
TEXAS INSTRUMENTS INC0 citations50
US9231025B2Jan 5, 2016
CMOS-based thermoelectric device with reduced electrical resistance
TEXAS INSTRUMENTS INC0 citations50
US9466520B2Oct 11, 2016
Localized region of isolated silicon over recessed dielectric layer
TEXAS INSTRUMENTS INC0 citations40
US9312164B2Apr 12, 2016
Localized region of isolated silicon over dielectric mesa
TEXAS INSTRUMENTS INC0 citations40