Inventor
KOMMU SRIKANTH
US17 patents
⚠️ This page may combine multiple inventors who share the name “KOMMU SRIKANTH”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
GLOBALWAFERS CO LTD
8 patentsUS11081386B2Aug 3, 2021
High resistivity SOI wafers and a method of manufacturing thereof
GLOBALWAFERS CO LTD2 citations73
US10910257B2Feb 2, 2021
High resistivity SOI wafers and a method of manufacturing thereof
GLOBALWAFERS CO LTD2 citations73
US11508612B2Nov 22, 2022
Semiconductor on insulator structure comprising a buried high resistivity layer
GLOBALWAFERS CO LTD2 citations71
US11081407B2Aug 3, 2021
Methods for assessing semiconductor structures
GLOBALWAFERS CO LTD4 citations71
US11699615B2Jul 11, 2023
High resistivity semiconductor-on-insulator wafer and a method of manufacture
GLOBALWAFERS CO LTD0 citations62
US11594446B2Feb 28, 2023
High resistivity SOI wafers and a method of manufacturing thereof
GLOBALWAFERS CO LTD0 citations62
US11139198B2Oct 5, 2021
High resistivity semiconductor-on-insulator wafer and a method of manufacturing
GLOBALWAFERS CO LTD0 citations62
US12557611B2Feb 17, 2026
Semiconductor on insulator structure comprising a buried high resistivity layer
GLOBALWAFERS CO LTD0 citations61
SUNEDISON SEMICONDUCTOR LTD UEN201334164H
4 patentsUS10483152B2Nov 19, 2019
High resistivity semiconductor-on-insulator wafer and a method of manufacturing
SUNEDISON SEMICONDUCTOR LTD UEN201334164H1 citations72
US10381260B2Aug 13, 2019
Method of manufacturing high resistivity semiconductor-on-insulator wafers with charge trapping layers
SUNEDISON SEMICONDUCTOR LTD UEN201334164H1 citations56
US10490464B2Nov 26, 2019
Methods for assessing semiconductor structures
SUNEDISON SEMICONDUCTOR LTD UEN201334164H0 citations51
US10381261B2Aug 13, 2019
Method of manufacturing high resistivity semiconductor-on-insulator wafers with charge trapping layers
SUNEDISON SEMICONDUCTOR LTD UEN201334164H0 citations43
SUNEDISON SEMICONDUCTOR LTD
3 patentsUS10468294B2Nov 5, 2019
High resistivity silicon-on-insulator substrate comprising a charge trapping layer formed on a substrate with a rough surface
SUNEDISON SEMICONDUCTOR LTD8 citations84
US10079170B2Sep 18, 2018
High resistivity SOI wafers and a method of manufacturing thereof
SUNEDISON SEMICONDUCTOR LTD3 citations72
US10622247B2Apr 14, 2020
Semiconductor on insulator structure comprising a buried high resistivity layer
SUNEDISON SEMICONDUCTOR LTD3 citations71