Inventor
CARPENTER BURTON JESSE
US13 patents
Patents
13 patentsUS10446476B2Oct 15, 2019
Packaged integrated circuit having stacked die and method for therefor
NXP USA INC3 citations70
US12040291B2Jul 16, 2024
Radio frequency packages containing multilevel power substrates and associated fabrication methods
NXP USA INC1 citations62
US11462494B2Oct 4, 2022
Semiconductor device package having galvanic isolation and method therefor
NXP USA INC0 citations61
US11164826B2Nov 2, 2021
Packaged integrated circuit having stacked die and method for making
NXP USA INC0 citations61
US12347753B2Jul 1, 2025
Semiconductor device having galvanic isolation and method therefor
NXP USA INC0 citations58
US11967507B2Apr 23, 2024
Tie bar removal for semiconductor device packaging
NXP USA INC0 citations57
US11222790B2Jan 11, 2022
Tie bar removal for semiconductor device packaging
NXP USA INC1 citations57
US10249557B2Apr 2, 2019
Packaged integrated circuit device and methods
NXP USA INC0 citations51
US11502068B2Nov 15, 2022
Semiconductor device package having galvanic isolation and method therefor
NXP USA INC0 citations50
US10734311B2Aug 4, 2020
Hybrid lead frame for semiconductor die package with improved creepage distance
NXP USA INC0 citations47
US10242935B2Mar 26, 2019
Packaged semiconductor device and method for forming
NXP USA INC0 citations40
US10734312B2Aug 4, 2020
Packaged integrated circuit having stacked die and method for therefor
NXP USA INC0 citations37
US10734327B2Aug 4, 2020
Lead reduction for improved creepage distance
NXP USA INC0 citations34