Inventor

SAYAMA HIROKAZU

JP48 patents

⚠️ This page may combine multiple inventors who share the name “SAYAMA HIROKAZU”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

SAYAMA HIROKAZU

RENESAS ELECTRONICS CORP

Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same

Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same

Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same

Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same

Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same

Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same

Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same

Method of manufacturing semiconductor device with offset sidewall structure

Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same

Semiconductor device and method of manufacturing the same

Semiconductor device and method of manufacturing the same

Semiconductor device

Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same

Method of manufacturing semiconductor device with offset sidewall structure

Method of manufacturing semiconductor device with offset sidewall structure

Semiconductor device and method for producing the same

Method of manufacturing semiconductor device with offset sidewall structure

Method of manufacturing semiconductor device with offset sidewall structure

Method of manufacturing semiconductor device with offset sidewall structure

Method of manufacturing semiconductor device with offset sidewall structure

Semiconductor device

RENESAS TECH CORP

Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same

Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same

Semiconductor device including gate electrode for applying tensile stress to silicon substrate, and method of manufacturing the same

Semiconductor device and manufacturing method thereof

Method of manufacturing semiconductor device with offset sidewall structure

Method of manufacturing semiconductor device with offset sidewall structure

Method of manufacturing semiconductor device with offset sidewall structure

Manufacturing method of semiconductor device

Semiconductor device and method of manufacturing same

Semiconductor device having offset insulation film formed on insulation film, and method of manufacturing the same

Method of manufacturing semiconductor device

Method of manufacturing semiconductor device having gate electrode with expanded upper portion

Method of manufacturing semiconductor device

Method of manufacturing semiconductor device

MITSUBISHI ELECTRIC CORP

Semiconductor device and method of manufacturing the same

Semiconductor device and method of manufacturing the same

Semiconductor device and manufacturing method thereof

Complementary MOS field effect transistor with tunnel effect means

Method of manufacturing semiconductor device

Semiconductor device manufacturing method

Semiconductor device and manufacturing method thereof

Semiconductor device and method of fabricating thereof

Semiconductor device, method of manufacturing the same and exposure mask for implantation

Semiconductor device

Semiconductor device and manufacturing method thereof

SAYAMA HIROKAZU

Semiconductor device including a high voltage P-channel transistor and method for manufacturing the same

OTA KAZUNOBU

Method of manufacturing semiconductor device with offset sidewall structure