Inventor

WALKER DEAN E

US42 patents

⚠️ This page may combine multiple inventors who share the name “WALKER DEAN E”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

WALKER DEAN E

MICRON TECHNOLOGY INC

Initialization sequencing of chiplet I/O channels within a chiplet system

Secondary device detection using a synchronous interface

Thread-based processor halting

Evicting a cache line with pending control request

Memory side cache request handling

Host-preferred memory operation

Variable execution time atomic operations

Recall pending cache line eviction

Method for configuring multiple input-output channels

Silent cache line eviction

Synchronized request handling at a memory device

Host-preferred memory operation

Evicting a cache line with pending control request

Variable execution time atomic operations

Memory-side cache directory-based request queue

Recall pending cache line eviction

Memory side cache request handling

Deferred communications over a synchronous interface

Secondary device detection using a synchronous interface

Initialization sequencing of chiplet I/O channels within a chiplet system

Payload parity protection for a synchronous interface

Method for configuring multiple input-output channels

Payload parity protection for a synchronous interface

Deferred communications over a synchronous interface

Memory access bounds checking for a programmable atomic operator

On-demand programmable atomic kernel loading

On-demand programmable atomic kernel loading

Memory access bounds checking for a programmable atomic operator

Low-latency register error correction

Low-latency register error correction

Thread replay to preserve state in a barrel processor

Rescheduling a failed memory request in a processor

Dynamic power and thermal loading in a chiplet-based system

Methods and systems for communications between hardware components

Reuse in-flight register data in a processor

Thread scheduling control and memory splitting in a barrel processor

CHIARO NETWORKS LTD

Router switch fabric protection using forward error correction

Timing and synchronization for an IP router using an optical switch

FOUNDRY NETWORKS INC

System and method for router data aggregation and delivery

CONVEY COMPUTER

Systems and methods for selectively controlling multithreaded execution of executable code segments

BREWER TONY M

System and method for router data aggregation and delivery

MCDERMOTT III THOMAS C

Router switch fabric protection using forward error correction