Inventor

BRANOVER ALEXANDER J

US52 patents

⚠️ This page may combine multiple inventors who share the name “BRANOVER ALEXANDER J”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

BRANOVER ALEXANDER J

ADVANCED MICRO DEVICES INC

Dynamic memory traffic optimization in multi-client systems

Method of task transition between heterogenous processors

Estimating leakage currents based on rates of temperature overages or power overages

Dynamic power allocation based on PHY power estimation

Selection of an operating point of a memory physical layer interface and a memory controller based on memory bandwidth utilization

Allocating power to compute units based on energy efficiency

Enhanced durability for systems on chip (SOCs)

Dynamic control of multi-region fabric

Shared data fabric processing client reset system and method

Technique for extended idle duration for display to improve power consumption

Using islands to control operating parameters for functional blocks in an electronic device

Method for adaptive performance optimization of the soc

Dynamic interrupt rate control in computing system

Dynamic clock control to increase stutter efficiency in the memory subsystem

Performance state selection for low activity scenarios

Transition into and out of a partially-off power state

Multi-tiered low power states

Method of task transition between heterogenous processors

On-demand IP initialization within power states

Device and method for two-stage transitioning between reduced power states

Method and apparatus for managing power states

Technique to enable simultaneous use of on-die SRAM as cache and memory

Device and method for efficient transitioning to and from reduced power state

Using a hardware-based controller for power state management

Device and method for efficient transitioning to and from reduced power state

Hierarchical state save and restore for device with varying power states

Arbitration scheme for coherent and non-coherent memory requests

Selecting a low power state in an electronic device

Dynamic control of multi-region fabric

Light-weight memory expansion in a coherent memory system

Technique for extended idle duration for display to improve power consumption

Dynamically controlled cache rinsing

Device and method for reducing save-restore latency using address linearization

Allocation control for cache

Transition into and out of a partially-off power state

Dynamic memory traffic optimization in multi-client systems

Systems and methods for sharing memory across clusters of directly connected nodes

Data fabric C-state management

Power state transitions

Coordinating accesses of shared resources by clients in a computing device

Method and apparatus for managing a controller in a power down state

Aligning active and idle phases in a mixed workload computing platform

BRANOVER ALEXANDER J

System and method for determining a power estimate for an I/O controller based on monitored activity levels and adjusting power limit of processing units by comparing the power estimate with an assigned power limit for the I/O controller

Methods and apparatus related to processor sleep states

Method and apparatus for transitioning a system to an active disconnect state

STEINMAN MAURICE B

Method for SOC performance and power optimization

Processor bridge power management

PRESANT STEPHEN D

Apparatus and method for managing power among a plurality of processors sharing a thermal platform

BIRCHER WILLIAM LLOYD

Power controller, processor and method of power management

SADOWSKI GREG

Adaptive connected standby for a computing device