Inventor
BUOT JOAN REY VILLARBA
US21 patents
Patents
21 patentsUS12381174B2Aug 5, 2025
Integrated circuit (IC) packages employing wire bond channel over package substrate, and related fabrication methods
QUALCOMM INC0 citations62
US11955409B2Apr 9, 2024
Substrate comprising interconnects in a core layer configured for skew matching
QUALCOMM INC0 citations62
US11832391B2Nov 28, 2023
Terminal connection routing and method the same
QUALCOMM INC0 citations62
US11804645B2Oct 31, 2023
Multi-sided antenna module employing antennas on multiple sides of a package substrate for enhanced antenna coverage, and related fabrication methods
QUALCOMM INC0 citations62
US11581251B2Feb 14, 2023
Package comprising inter-substrate gradient interconnect structure
QUALCOMM INC0 citations62
US11322490B2May 3, 2022
Modular capacitor array
QUALCOMM INC0 citations62
US11296022B2Apr 5, 2022
Package and substrate comprising interconnects with semi-circular planar shape and/or trapezoid planar shape
QUALCOMM INC0 citations62
US11791320B2Oct 17, 2023
Integrated circuit (IC) packages employing a package substrate with a double side embedded trace substrate (ETS), and related fabrication methods
QUALCOMM INC0 citations61
US12581966B2Mar 17, 2026
Electronic component placed on core of substrate
QUALCOMM INC0 citations60
US12500146B2Dec 16, 2025
Substrate(s) for an integrated circuit (IC) package employing a metal core for improved electrical shielding and structural strength, and related IC packages and fabrication methods
QUALCOMM INC0 citations60
US11764076B2Sep 19, 2023
Semi-embedded trace structure with partially buried traces
QUALCOMM INC0 citations60
US11676905B2Jun 13, 2023
Integrated circuit (IC) package with stacked die wire bond connections, and related methods
QUALCOMM INC0 citations55
US12021063B2Jun 25, 2024
Circular bond finger pad
QUALCOMM INC0 citations52
US11562962B2Jan 24, 2023
Package comprising a substrate and interconnect device configured for diagonal routing
QUALCOMM INC0 citations52
US11302656B2Apr 12, 2022
Passive device orientation in core for improved power delivery in package
QUALCOMM INC0 citations52
US12230552B2Feb 18, 2025
Recess structure for padless stack via
QUALCOMM INC0 citations51
US12100645B2Sep 24, 2024
Integrated circuit (IC) package employing added metal for embedded metal traces in ETS-based substrate for reduced signal path impedance, and related fabrication methods
QUALCOMM INC0 citations51
US11791276B2Oct 17, 2023
Package comprising passive component between substrates for improved power distribution network (PDN) performance
QUALCOMM INC0 citations51
US12362269B2Jul 15, 2025
Integrated circuit (IC) packages employing supplemental metal layer coupled to embedded metal traces in a die-side embedded trace substrate (ETS) layer, and related fabrication methods
QUALCOMM INC0 citations49
US11342254B2May 24, 2022
Multi-dielectric structure in two-layer embedded trace substrate
QUALCOMM INC0 citations49
US12593709B2Mar 31, 2026
Substrate(s) for an integrated circuit (IC) package employing a core layer and an adjacent insulation layer(s) with an embedded metal structure(s) positioned from the core layer
QUALCOMM INC0 citations44