Inventor

TAN PHEY-CHUIN

MY2 patents

Patents

2 patents

US8629548B1Jan 14, 2014

Clock network fishbone architecture for a structured ASIC manufactured on a 28 NM CMOS process lithographic node

EASIC CORP56 citations92

US8957398B2Feb 17, 2015

Via-configurable high-performance logic block involving transistor chains

EASIC CORP4 citations68