Inventor

VASUDEV PRAHALAD K

US25 patents

⚠️ This page may combine multiple inventors who share the name “VASUDEV PRAHALAD K”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

VASUDEV PRAHALAD K

HUGHES AIRCRAFT CO

Opposed dual-gate hybrid structure for three-dimensional integrated circuits

Process of making semiconductors having shallow, hyperabrupt doped regions by implantation and two step annealing

Selective area double epitaxial process for fabricating silicon-on-insulator structures for use with MOS devices and integrated circuits

Solid phase epitaxy and regrowth process with controlled defect density profiling for heteroepitaxial semiconductor on insulator composite substrates

Ultrathin submicron MOSFET with intrinsic channel

Floating base lateral bipolar phototransistor with field effect gate voltage control

Low leakage CMOS/insulator substrate devices and method of forming the same

Method of forming low leakage CMOS device on insulating substrate

Process for fabrication of monolithic transistor coupled electroluminescent diode

Monolithic transistor coupled electroluminescent diode

Silicon-on-sapphire liquid crystal light valve and method

SEMATECH INC

Globally planarized binary optical mask using buried absorbers

Method of making a dual damascene interconnect structure using low dielectric constant material for an inter-level dielectric layer

Dual damascene interconnect structure using low dielectric constant material for an inter-level dielectric layer

Selective electroless copper deposited interconnect plugs for ULSI applications

Attenuated phase shifting mask with buried absorbers

Electric field initiated electroless metal deposition

Phase shifting mask structure with multilayer optical coating for improved transmission

Method of fabricating phase shifters with absorbing/attenuating sidewalls using an additive process

Phase shifting mask structure with absorbing/attenuating sidewalls for improved imaging

CORNELL RES FOUNDATION INC

Electroless deposition equipment or apparatus and method of performing electroless deposition

Electroless CU deposition on a barrier layer by CU contact displacement for ULSI applications

Use of cobalt tungsten phosphide as a barrier material for copper metallization

Protected encapsulation of catalytic layer for electroless copper interconnect

VASUDEV PRAHALAD K

MOS-enhanced, self-aligned lateral bipolar transistor made of a semiconductor on an insulator