Inventor

JENNE FREDRICK B

US35 patents

⚠️ This page may combine multiple inventors who share the name “JENNE FREDRICK B”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.

JENNE FREDRICK B

CYPRESS SEMICONDUCTOR CORP

Non-volatile random access memory and methods for making and configuring same

Oxide-nitride-oxide stack having multiple oxynitride layers

Latch circuit and method for writing and reading volatile and non-volatile data to and from the latch

Apparatus and method for correcting data in a non-volatile random access memory

Three cycle memory programming

Method and structure for a single-sided non-self-aligned transistor

SONOS stack with split nitride memory layer

SONOS stack with split nitride memory layer

SONOS stack with split nitride memory layer

Method and apparatus for reduction of bit-line disturb and soft-erase in a trapped-charge memory

Antifuse capacitor for configuring integrated circuits

Antifuse circuit with dynamic current limiter

Antifuse circuit with current regulator for controlling programming current

Method and apparatus for programming memory cell array

Memory architecture having two independently controlled voltage pumps

Method and apparatus for reduction of bit-line disturb and soft-erase in a trapped-charge memory

Deuterated film encapsulation of nonvolatile charge trap memory device

SONOS ONO stack scaling

Memory architecture having two independently controlled voltage pumps

Longitude Flash Memory Solutions Ltd

Method of ONO integration into logic CMOS flow

Sonos stack with split nitride memory layer

SONOS stack with split nitride memory layer

Method of ono integration into logic CMOS flow

Method of ono integration into logic CMOS flow

RAMKUMAR KRISHNASWAMY

Method of ONO integration into MOS flow

Integration of non-volatile charge trap memory devices and logic CMOS devices

Simultaneously forming a dielectric layer in MOS and ONO device regions

Deuterated film encapsulation of nonvolatile charge trap memory device

JENNE FREDRICK B

SONOS ONO stack scaling

Photodiode having a buried well region

Method and apparatus for extending the lifetime of a non-volatile trapped-charge memory

LEVY SAGY

Nitridation oxidation of tunneling layer for improved SONOS speed and retention

Nonvolatile charge trap memory device having a deuterated layer in a multi-layer charge-trapping region

KOUTNY JR WILLIAM W C

Integration of non-volatile charge trap memory devices and logic CMOS devices

SILICON MAGNETIC SYSTEMS

Magnetic memory array architecture