Inventor
Ryvchin Galina
IL12 patents
Patents
12 patentsUS10372416B2Aug 6, 2019
Multiply-accumulate “0” data gating
INTEL CORP15 citations93
US11169802B2Nov 9, 2021
Systems, apparatuses, and methods for fused multiply add
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US11544058B2Jan 3, 2023
Systems, apparatuses, and methods for fused multiply add
INTEL CORP2 citations73
US11526354B2Dec 13, 2022
Systems, apparatuses, and methods for fused multiply add
INTEL CORP2 citations73
US11526353B2Dec 13, 2022
Systems, apparatuses, and methods for fused multiply add
INTEL CORP2 citations73
US11507369B2Nov 22, 2022
Systems, apparatuses, and methods for fused multiply add
INTEL CORP2 citations73
US10853035B2Dec 1, 2020
Multiply-accumulate “0” data gating
INTEL CORP2 citations72
US10606559B2Mar 31, 2020
Multiply-accumulate “0” data gating
INTEL CORP1 citations72
US12124846B2Oct 22, 2024
Systems, apparatuses, and methods for addition of partial products
INTEL CORP0 citations62
US11782709B2Oct 10, 2023
Systems, apparatuses, and methods for addition of partial products
INTEL CORP0 citations62
US11656846B2May 23, 2023
Multiply-accumulate “0” data gating
INTEL CORP0 citations62
US9875213B2Jan 23, 2018
Methods, apparatus, instructions and logic to provide vector packed histogram functionality
INTEL CORP0 citations51