Inventor
OZTASKIN ALI S
US20 patents
⚠️ This page may combine multiple inventors who share the name “OZTASKIN ALI S”. Patents are grouped by organization below to help distinguish them — per-person disambiguation is on the roadmap.
INTEL CORP
19 patentsUS6347362B1Feb 12, 2002
Flexible event monitoring counters in multi-node processor systems and process of operating the same
INTEL CORP106 citations98
US6085325AJul 4, 2000
Method and apparatus for supporting power conservation operation modes
INTEL CORP113 citations97
US5768626AJun 16, 1998
Method and apparatus for servicing a plurality of FIFO's in a capture gate array
INTEL CORP55 citations95
US5630094AMay 13, 1997
Integrated bus bridge and memory controller that enables data streaming to a shared memory of a computer system using snoop ahead transactions
INTEL CORP60 citations95
US5559965ASep 24, 1996
Input/output adapter cards having a plug and play compliant mode and an assigned resources mode
INTEL CORP133 citations94
US5897667AApr 27, 1999
Method and apparatus for transferring data received from a first bus in a non-burst manner to a second bus in a burst manner
INTEL CORP26 citations92
US5838387ANov 17, 1998
Digital video scaling engine
INTEL CORP21 citations92
US5982425ANov 9, 1999
Method and apparatus for draining video data from a planarized video buffer
INTEL CORP67 citations91
US5479647ADec 26, 1995
Clock generation and distribution system for a memory controller with a CPU interface for synchronizing the CPU interface with a microprocessor external to the memory controller
INTEL CORP31 citations90
US7702826B2Apr 20, 2010
Method and apparatus by utilizing platform support for direct memory access remapping by remote DMA (“RDMA”)-capable devices
INTEL CORP18 citations83
US7263568B2Aug 28, 2007
Interrupt system using event data structures
INTEL CORP15 citations83
US6058440AMay 2, 2000
Programmable and adaptive resource allocation device and resource use recorder
INTEL CORP16 citations83
US7487284B2Feb 3, 2009
Transaction flow and ordering for a packet processing engine, located within an input-output hub
INTEL CORP8 citations80
US5941960AAug 24, 1999
Host initiated PCI burst writes utilizing posted write buffers
INTEL CORP12 citations73
US6115796ASep 5, 2000
Integrated bus bridge and memory controller that enables data streaming to a shared memory of a computer system using snoop ahead transactions
INTEL CORP12 citations72
US5463744AOct 31, 1995
Emulation of slower speed processor
INTEL CORP2 citations62
US7853957B2Dec 14, 2010
Doorbell mechanism using protection domains
INTEL CORP5 citations61
US7694100B2Apr 6, 2010
Managing system memory resident device management queues
INTEL CORP3 citations59
US9507752B2Nov 29, 2016
Methods, apparatus and systems for facilitating RDMA operations with reduced doorbell rings
INTEL CORP0 citations42