P

Inventor

KIM SONGMIN

US15 patents

Patents

15 patents
US6424170B1Jul 23, 2002

Apparatus and method for linear on-die termination in an open drain bus architecture system

INTEL CORP97 citations96
US6411122B1Jun 25, 2002

Apparatus and method for dynamic on-die termination in an open-drain bus architecture system

INTEL CORP101 citations96
US6535047B2Mar 18, 2003

Apparatus and method to use a single reference component in a master-slave configuration for multiple circuit compensation

INTEL CORP53 citations95
US7417459B2Aug 26, 2008

On-die offset reference circuit block

INTEL CORP21 citations92
US6748549B1Jun 8, 2004

Clocking an I/O buffer, having a selectable phase difference from the system clock, to and from a remote I/O buffer clocked in phase with the system clock

INTEL CORP48 citations92
US6717455B2Apr 6, 2004

Apparatus and method to use a single reference component in a master-slave configuration for multiple circuit compensation

INTEL CORP33 citations92
US6407591B1Jun 18, 2002

Self-configurable clock input buffer compatible with high-voltage single-ended and low-voltage differential clock signals

INTEL CORP25 citations92
US6240123B1May 29, 2001

Asynchronous spread spectrum clocking

INTEL CORP44 citations92
US7038512B2May 2, 2006

Closed-loop independent DLL-controlled rise/fall time control circuit

INTEL CORP30 citations91
US7429881B2Sep 30, 2008

Wide input common mode sense amplifier

INTEL CORP12 citations80
US7038513B2May 2, 2006

Closed-loop independent DLL-controlled rise/fall time control circuit

INTEL CORP8 citations72
US5856755AJan 5, 1999

Bus termination voltage supply

INTEL CORP8 citations71
US7197659B2Mar 27, 2007

Global I/O timing adjustment using calibrated delay elements

INTEL CORP4 citations63
US7038505B2May 2, 2006

Configurable enabling pulse clock generation for multiple signaling modes

INTEL CORP3 citations58
US7276942B2Oct 2, 2007

Method for configurably enabling pulse clock generation for multiple signaling modes

INTEL CORP0 citations48